Roberto Suaya

622 total citations
24 papers, 458 citations indexed

About

Roberto Suaya is a scholar working on Electrical and Electronic Engineering, Atomic and Molecular Physics, and Optics and Aerospace Engineering. According to data from OpenAlex, Roberto Suaya has authored 24 papers receiving a total of 458 indexed citations (citations by other indexed papers that have themselves been cited), including 21 papers in Electrical and Electronic Engineering, 6 papers in Atomic and Molecular Physics, and Optics and 4 papers in Aerospace Engineering. Recurrent topics in Roberto Suaya's work include Electromagnetic Compatibility and Noise Suppression (13 papers), 3D IC and TSV technologies (11 papers) and Electromagnetic Scattering and Analysis (6 papers). Roberto Suaya is often cited by papers focused on Electromagnetic Compatibility and Noise Suppression (13 papers), 3D IC and TSV technologies (11 papers) and Electromagnetic Scattering and Analysis (6 papers). Roberto Suaya collaborates with scholars based in United States, Hungary and Argentina. Roberto Suaya's co-authors include Kaustav Banerjee, Chuan Xu, Hong Li, Zhi Guo Qian, Weng Cho Chew, Navin Srivastava, John Wawrzynek, N. Srivastava, Luca Daniel and John Rushby and has published in prestigious journals such as IEEE Transactions on Microwave Theory and Techniques, IEEE Transactions on Electron Devices and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

In The Last Decade

Roberto Suaya

22 papers receiving 444 citations

Peers

Countries citing papers authored by Roberto Suaya

Since Specialization

Citations

This map shows the geographic impact of Roberto Suaya's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Roberto Suaya with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Roberto Suaya more than expected).

Fields of papers citing papers by Roberto Suaya

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Roberto Suaya. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Roberto Suaya. The network helps show where Roberto Suaya may publish in the future.

Co-authorship network of co-authors of Roberto Suaya

This figure shows the co-authorship network connecting the top 25 collaborators of Roberto Suaya. A scholar is included among the top collaborators of Roberto Suaya based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Roberto Suaya. Roberto Suaya is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

Sort: Min cites: Since: Top N: Style:

20 of 20 papers shown

#	Work	Indexed citations
1	Low Power SPI Design Based on Relative Timing Techniques 2019 ·(unknown), (unknown), (unknown), (unknown), Kenneth S. Stevens, Roberto Suaya	0
2	Through silicon via admittance field solver of system level capacity: Theory 2013 ·(unknown), Roberto Suaya	1
3	Leveraging the geometric properties of on-chip transmission line structures to improve interconnect performance: A case study in 65nm 2013 ·(unknown), (unknown), Kenneth S. Stevens, Roberto Suaya	1
4	Fast extraction of high-frequency parallel admittance of Through-Silicon-Vias and their capacitive coupling-noise to active regions 2012 ·Chuan Xu, Roberto Suaya, Kaustav Banerjee	5
5	An efficient framework for passive compact dynamical modeling of multiport linear systems 2012 ·(unknown), Roberto Suaya, Luca Daniel	6
6	Fast High-Frequency Impedance Extraction of Horizontal Interconnects and Inductors in 3-D ICs With Multiple Substrates 2012 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Chuan Xu, N. Srivastava, Roberto Suaya, Kaustav Banerjee	4
7	Corrections to “Analytical Expressions for High-Frequency VLSI Interconnect Impedance Extraction in the Presence of a Multilayer Conductive Substrate” [Jul 09 1047-1060 2010 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Navin Srivastava, Chuan Xu, Roberto Suaya, Kaustav Banerjee	2
8	Compact modeling and analysis of coupling noise induced by through-Si-vias in 3-D ICs 2010 ·Chuan Xu, Roberto Suaya, Kaustav Banerjee	9
9	Compact AC Modeling and Performance Analysis of Through-Silicon Vias in 3-D ICs 2010 ·IEEE Transactions on Electron Devices ·Chuan Xu, Hong Li, Roberto Suaya, Kaustav Banerjee	224
10	Efficient 3D high-frequency impedance extraction for general interconnects and inductors above a layered substrate 2010 ·Navin Srivastava, Roberto Suaya, Kaustav Banerjee	3
11	Analytical Expressions for High-Frequency VLSI Interconnect Impedance Extraction in the Presence of a Multilayer Conductive Substrate 2009 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·N. Srivastava, Roberto Suaya, Kaustav Banerjee	4
12	Compact AC modeling and analysis of Cu, W, and CNT based through-silicon vias (TSVs) in 3-D ICs 2009 ·Chuan Xu, Hong Li, Roberto Suaya, Kaustav Banerjee	37
13	High-Frequency Mutual Impedance Extraction of VLSI Interconnects In the Presence of a Multi-layer Conducting Substrate 2008 ·2008 Design, Automation and Test in Europe ·Navin Srivastava, Roberto Suaya, Kaustav Banerjee	2
14	High-frequency mutual impedance extraction of VLSI interconnects in the presence of a multi-layer conducting substrate 2008 ·Navin Srivastava, Roberto Suaya, Kaustav Banerjee	2
15	Modeling and Extraction of Nanometer Scale Interconnects: Challenges and Opportunities (Invited) 2006 ·Roberto Suaya, (unknown), (unknown), Kaustav Banerjee, Navin Srivastava	2
16	Fullwave Volumetric Maxwell solver using Conduction Modes 2006 ·Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design ·(unknown), Roberto Suaya	4
17	From formal verification to silicon compilation 2002 ·(unknown), (unknown), John Rushby, Natarajan Shankar, Roberto Suaya, Friedrich von Henke	0
18	A topological framework for compaction and routing 1991 ·(unknown), (unknown), Roberto Suaya, John Wawrzynek	1
19	A two-dimensional topological compactor with octagonal geometry 1991 ·(unknown), John Wawrzynek, (unknown), Roberto Suaya	6
20	Two-dimensional IC layout compaction based on topological design rule checking 1990 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·(unknown), (unknown), (unknown), Roberto Suaya	9

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact