Rajiv Ravindran

578 total citations
16 papers, 421 citations indexed

About

Rajiv Ravindran is a scholar working on Hardware and Architecture, Computer Networks and Communications and Electrical and Electronic Engineering. According to data from OpenAlex, Rajiv Ravindran has authored 16 papers receiving a total of 421 indexed citations (citations by other indexed papers that have themselves been cited), including 15 papers in Hardware and Architecture, 10 papers in Computer Networks and Communications and 3 papers in Electrical and Electronic Engineering. Recurrent topics in Rajiv Ravindran's work include Parallel Computing and Optimization Techniques (15 papers), Embedded Systems Design Techniques (12 papers) and Interconnection Networks and Systems (10 papers). Rajiv Ravindran is often cited by papers focused on Parallel Computing and Optimization Techniques (15 papers), Embedded Systems Design Techniques (12 papers) and Interconnection Networks and Systems (10 papers). Rajiv Ravindran collaborates with scholars based in United States, Slovakia and India. Rajiv Ravindran's co-authors include Scott Mahlke, Michael Chu, Richard B. Brown, Ganesh Dasika, E.D. Marsman, Robert M. Senger, Timothy Sherwood, Robert Schreiber, Michael Schlansker and Michael Chu and has published in prestigious journals such as IEEE Transactions on Computers, IBM Journal of Research and Development and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

In The Last Decade

Rajiv Ravindran

16 papers receiving 406 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
Rajiv Ravindran United States	8	320	308	189	63	22	16	421
Prakash Iyer United States	6	324 1.0×	414 1.3×	310 1.6×	57 0.9×	14 0.6×	7	531
Girish V. Varatkar United States	11	357 1.1×	378 1.2×	265 1.4×	79 1.3×	36 1.6×	17	552
H. Wilson United States	7	379 1.2×	454 1.5×	348 1.8×	53 0.8×	23 1.0×	8	590
Thomas Ebi Germany	13	293 0.9×	226 0.7×	260 1.4×	33 0.5×	6 0.3×	20	422
Riccardo Locatelli Italy	11	316 1.0×	398 1.3×	201 1.1×	73 1.2×	10 0.5×	31	461
Anh Tran United States	12	327 1.0×	359 1.2×	264 1.4×	48 0.8×	22 1.0×	29	557
Clark Roberts United States	8	358 1.1×	429 1.4×	484 2.6×	55 0.9×	44 2.0×	11	712
Henry Hoffman United States	4	583 1.8×	625 2.0×	248 1.3×	62 1.0×	7 0.3×	5	741
Ki Hwan Yum United States	15	353 1.1×	534 1.7×	295 1.6×	50 0.8×	9 0.4×	48	623
Miltos D. Grammatikakis Greece	11	223 0.7×	301 1.0×	135 0.7×	34 0.5×	7 0.3×	41	366

Countries citing papers authored by Rajiv Ravindran

Since Specialization

Citations

This map shows the geographic impact of Rajiv Ravindran's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Rajiv Ravindran with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Rajiv Ravindran more than expected).

Fields of papers citing papers by Rajiv Ravindran

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Rajiv Ravindran. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Rajiv Ravindran. The network helps show where Rajiv Ravindran may publish in the future.

Co-authorship network of co-authors of Rajiv Ravindran

This figure shows the co-authorship network connecting the top 25 collaborators of Rajiv Ravindran. A scholar is included among the top collaborators of Rajiv Ravindran based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Rajiv Ravindran. Rajiv Ravindran is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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16 of 16 papers shown

Stratton, John A., et al.. (2020). Optimizing Halide for Digital Signal Processors. 1–6. 1 indexed citations

Rowen, Chris, D. Nicolaescu, Rajiv Ravindran, et al.. (2011). The world's fastest DSP core: Breaking the 100 GMAC/s barrier. 1–25. 4 indexed citations

Mahlke, Scott & Rajiv Ravindran. (2007). Hardware/software techniques for memory power optimizations in embedded processors.. Deep Blue (University of Michigan). 3 indexed citations

Chu, Michael, Rajiv Ravindran, & Scott Mahlke. (2007). Data Access Partitioning for Fine-grain Parallelism on Multicore Architectures. 369–380. 227 indexed citations

Ravindran, Rajiv, Michael Chu, & Scott Mahlke. (2007). Compiler-managed partitioned data caches for low power. ACM SIGPLAN Notices. 42(7). 237–247. 3 indexed citations

Chu, Michael, Rajiv Ravindran, & Scott Mahlke. (2007). Data Access Partitioning for Fine-grain Parallelism on Multicore Architectures. 3 indexed citations

Ravindran, Rajiv, Michael Chu, & Scott Mahlke. (2007). Compiler-managed partitioned data caches for low power. 237–247. 13 indexed citations

Marsman, E.D., Robert M. Senger, Michael S. McCorquodale, et al.. (2005). A 16-bit low-power microcontroller with monolithic MEMS-LC clocking. 624–627 Vol. 1. 16 indexed citations

Ravindran, Rajiv, Robert M. Senger, E.D. Marsman, et al.. (2005). Partitioning Variables across Register Windows to Reduce Spill Code in a Low-Power Processor. IEEE Transactions on Computers. 54(8). 998–1012. 17 indexed citations

10.

Ravindran, Rajiv, Ganesh Dasika, E.D. Marsman, et al.. (2005). Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache. cse tr 411 99. 179–190. 35 indexed citations

11.

Kudlur, Manjunath, Kevin Fan, Michael Chu, et al.. (2004). FLASH: foresighted latency-aware scheduling heuristic for processors with customized datapaths. 201–212. 4 indexed citations

12.

Chu, Michael, Kevin Fan, Rajiv Ravindran, & Scott Mahlke. (2004). Cost-sensitive partitioning in an architecture synthesis system for multicluster processors. IEEE Micro. 24(3). 10–20. 1 indexed citations

13.

Fan, Kevin, Nathan Clark, Michael Chu, et al.. (2004). Systematic register bypass customization for application-specific processors. 64–74. 22 indexed citations

14.

Ravindran, Rajiv, Robert M. Senger, E.D. Marsman, et al.. (2003). Increasing the number of effective registers in a low-power processor using a windowed register file. 125–136. 12 indexed citations

15.

Brock, Bishop, Gary D. Carpenter, Eli Chiprout, et al.. (2001). Experience with building a commodity Intel-based ccNUMA system. IBM Journal of Research and Development. 45(2). 207–227. 5 indexed citations

16.

Mahlke, Scott, Rajiv Ravindran, Michael Schlansker, Robert Schreiber, & Timothy Sherwood. (2001). Bitwidth cognizant architecture synthesis of custom hardware accelerators. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 20(11). 1355–1371. 55 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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