Ganesh Dasika

1.9k total citations · 1 hit paper
27 papers, 1.3k citations indexed

About

Ganesh Dasika is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Computer Networks and Communications. According to data from OpenAlex, Ganesh Dasika has authored 27 papers receiving a total of 1.3k indexed citations (citations by other indexed papers that have themselves been cited), including 17 papers in Hardware and Architecture, 11 papers in Electrical and Electronic Engineering and 10 papers in Computer Networks and Communications. Recurrent topics in Ganesh Dasika's work include Parallel Computing and Optimization Techniques (15 papers), Embedded Systems Design Techniques (8 papers) and Interconnection Networks and Systems (8 papers). Ganesh Dasika is often cited by papers focused on Parallel Computing and Optimization Techniques (15 papers), Embedded Systems Design Techniques (8 papers) and Interconnection Networks and Systems (8 papers). Ganesh Dasika collaborates with scholars based in United States, United Kingdom and Greece. Ganesh Dasika's co-authors include Scott Mahlke, Vikas Chandra, Andrew Lukefahr, Jae-sun Seo, David J. Palframan, Reetuparna Das, Abinash Mohanty, Yufei Ma, Jiecao Yu and Sarma Vrudhula and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Computers and IEEE Transactions on Circuits and Systems I Regular Papers.

In The Last Decade

Ganesh Dasika

27 papers receiving 1.2k citations

Hit Papers

Throughput-Optimized OpenCL-based FPGA Accelerator for La... 2016 2026 2019 2022 2016 100 200 300

Peers

Ganesh Dasika
Paul N. Whatmough United States
Yingyan Lin United States
Joo-Young Kim South Korea
John Glossner United States
Liu Liu China
Aiman H. El‐Maleh Saudi Arabia
Sae Kyu Lee United States
Paul N. Whatmough United States
Ganesh Dasika
Citations per year, relative to Ganesh Dasika Ganesh Dasika (= 1×) peers Paul N. Whatmough

Countries citing papers authored by Ganesh Dasika

Since Specialization
Citations

This map shows the geographic impact of Ganesh Dasika's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Ganesh Dasika with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Ganesh Dasika more than expected).

Fields of papers citing papers by Ganesh Dasika

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Ganesh Dasika. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Ganesh Dasika. The network helps show where Ganesh Dasika may publish in the future.

Co-authorship network of co-authors of Ganesh Dasika

This figure shows the co-authorship network connecting the top 25 collaborators of Ganesh Dasika. A scholar is included among the top collaborators of Ganesh Dasika based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Ganesh Dasika. Ganesh Dasika is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Talati, Nishil, Di Jin, Haojie Ye, et al.. (2021). A Deep Dive Into Understanding The Random Walk-Based Temporal Graph Learning. 87–100. 7 indexed citations
2.
Thakker, Urmish, et al.. (2021). Compressing RNNs to Kilobyte Budget for IoT Devices Using Kronecker Products. ACM Journal on Emerging Technologies in Computing Systems. 17(4). 1–18. 5 indexed citations
3.
Dasika, Ganesh, et al.. (2019). Ternary Hybrid Neural-Tree Networks for Highly Constrained IoT Applications. arXiv (Cornell University). 1. 190–200. 1 indexed citations
4.
Yu, Jiecao, Andrew Lukefahr, David J. Palframan, et al.. (2017). Scalpel. 548–560. 181 indexed citations
5.
Yu, Jiecao, Andrew Lukefahr, David J. Palframan, et al.. (2017). Scalpel. ACM SIGARCH Computer Architecture News. 45(2). 548–560. 113 indexed citations
6.
Fernández-Carrobles, M. Milagro, Óscar Déniz, Samuel Fricker, et al.. (2017). BONSEYES. MURAL - Maynooth University Research Archive Library (National University of Ireland, Maynooth). 299–304. 10 indexed citations
7.
Suda, Naveen, Vikas Chandra, Ganesh Dasika, et al.. (2016). Throughput-Optimized OpenCL-based FPGA Accelerator for Large-Scale Convolutional Neural Networks. 16–25. 393 indexed citations breakdown →
8.
Das, Shidhartha, et al.. (2014). A 1 GHz Hardware Loop-Accelerator With Razor-Based Dynamic Adaptation for Energy-Efficient Operation. IEEE Transactions on Circuits and Systems I Regular Papers. 61(8). 2290–2298. 9 indexed citations
9.
Dasika, Ganesh, et al.. (2013). Memory-centric system interconnect design with hybrid memory cubes. 145–156. 41 indexed citations
10.
11.
Dasika, Ganesh, et al.. (2012). A Customized Processor for Energy Efficient Scientific Computing. IEEE Transactions on Computers. 61(12). 1711–1723. 7 indexed citations
12.
Dasika, Ganesh, et al.. (2011). PEPSC: A Power-Efficient Processor for Scientific Computing. 101–110. 11 indexed citations
13.
Dasika, Ganesh, Mark Woh, Sangwon Seo, et al.. (2010). Mighty-morphing power-SIMD. 67–76. 8 indexed citations
14.
Dasika, Ganesh, et al.. (2010). MEDICS. 181–192. 5 indexed citations
16.
Bull, David, et al.. (2010). A Power-Efficient 32 bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation. IEEE Journal of Solid-State Circuits. 46(1). 18–31. 128 indexed citations
17.
Dasika, Ganesh, Shidhartha Das, Kevin Fan, Scott Mahlke, & David Bull. (2008). DVFS in loop accelerators using BLADES. 894–897. 10 indexed citations
18.
Marsman, E.D., Robert M. Senger, Michael S. McCorquodale, et al.. (2005). A 16-bit low-power microcontroller with monolithic MEMS-LC clocking. 624–627 Vol. 1. 16 indexed citations
19.
Ravindran, Rajiv, Robert M. Senger, E.D. Marsman, et al.. (2005). Partitioning Variables across Register Windows to Reduce Spill Code in a Low-Power Processor. IEEE Transactions on Computers. 54(8). 998–1012. 17 indexed citations
20.
Ravindran, Rajiv, Robert M. Senger, E.D. Marsman, et al.. (2003). Increasing the number of effective registers in a low-power processor using a windowed register file. 125–136. 12 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact

Rankless by CCL
2026