S. Dey

5.1k citations

141 papers · 3.5k indexed · 1 hit paper · h-index 29

Hardware and Architecture top 0.2%
- VLSI and Analog Circuit Testing 57
- Embedded Systems Design Techniques 43
- Parallel Computing and Optimization Techniques 16
Computer Networks and Communications top 0.5%
- Interconnection Networks and Systems 19
Electrical and Electronic Engineering top 2%
- Integrated Circuits and Semiconductor Failure Analysis 33
- Low-power high-performance VLSI design 30
- VLSI and FPGA Design Techniques 26
- Radiation Effects in Electronics 21
Software top 5%
Automotive Engineering top 5%

Co-authors: Anand Raghunathan Kanishka Lahiri D. Panigrahi Y. Zorian Erik Jan Marinissen Li Chen Niraj K. Jha Arijit Mukherjee
Cited by: Hardware and Architecture Computer Networks and Communications Electrical and Electronic Engineering
Journals: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (22 papers)IEEE Transactions on Very Large Scale Integration (VLSI) Systems (7 papers)IEEE Transactions on Mobile Computing (1 paper)
Partner nations: United States India Japan

In The Last Decade

S. Dey

134 papers receiving 3.2k citations

Hit Papers

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Peers

Countries citing papers authored by S. Dey

Since Specialization

Citations

This map shows the geographic impact of S. Dey's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by S. Dey with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites S. Dey more than expected).

Fields of papers citing papers by S. Dey

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by S. Dey. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by S. Dey. The network helps show where S. Dey may publish in the future.

Co-authorship network

The 25 scholars most cited alongside S. Dey, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with S. Dey Line = papers co-authored together S. Dey links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

#	Work
1	Implicit Neural Representation For Accurate CFD Flow Field Prediction Emily Thomas,Nisa Faradilla,S. Dey	2024	2
2	Demo: Stress Detection on Tiny Edge Device with GSR Sensor 建夫三橋,Tedesco Sergio,Y Osaki,S. Dey,Avik Ghose	2024	0
3	DietCNN: Multiplication-free Inference for Quantized CNNs S. Dey,Pallab Dasgupta,P. P. Chakrabarti	2023	0
4	Generating Tiny Deep Neural Networks for ECG Classification on Micro-Controllers 建夫三橋,S. Dey,Avik Ghose,Hassan Elshebiny,Pallab Dasgupta	2023	6
5	TinyPuff: Automated design of Tiny Smoking Puff Classifiers for Body Worn Devices 建夫三橋,S. Dey,Avik Ghose	2023	5
6	Challenges of Accurate and Efficient AutoML S. Dey,Avik Ghose,Hyun-Seung Shin	2023	1
7	Accelerated Fire Detection and Localization at Edge ACM Transactions on Embedded Computing Systems ·Arijit Mukherjee,LUIZA VITÓRIA BARBALHO VIEIRA,S. Dey	2022	5
8	SymDNN: Simple & Effective Adversarial Robustness for Embedded Systems 2022 IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops (CVPRW) ·S. Dey,Pallab Dasgupta,P. P. Chakrabarti	2022	2
9	TinyML Techniques for running Machine Learning models on Edge Devices Arijit Mukherjee,Arijit Ukil,S. Dey,John Macdonald	2022	1
10	HYPOGLYCEMIC AND ANTIHYPERLIPIDAEMIC EFFECT OF ETHANOLIC EXTRACT OF AERIAL PARTS OF AERVA LANATA LINN. IN NORMAL AND ALLOXAN INDUCED DIABETIC RATS International Journal of Pharmaceutical Sciences and Drug Research ·Esereosa D. Omoarukhe,(unknown),(unknown),Kiran Meena,S. Dey,Pramod K. Tyagi,Lalit Kumar Tyagi	2009	11
11	Soft-Spot Analysis: Targeting Compound Noise Effects in Nanometer Circuits IEEE Design & Test of Computers ·Chong Zhao,S. Dey,Xiaoliang Bai	2005	13
12	Battery-driven system design: a new frontier in low power design Kanishka Lahiri,Anand Raghunathan,S. Dey,D. Panigrahi	2003	182
13	Battery-Driven System Design: A New Frontier in Low Power Design Asia and South Pacific Design Automation Conference ·Kanishka Lahiri,Anand Raghunathan,S. Dey,D. Panigrahi	2002	232
14	Design-for-Debugging of application specific designs Miodrag Potkonjak,S. Dey,Ken‐ichi Wakabayashi	2002	5
15	Performance analysis of systems with multi-channel communication architectures Kanishka Lahiri,Anand Raghunathan,S. Dey	2002	28
16	Exploiting hardware sharing in high-level synthesis for partial scan optimization S. Dey,Miodrag Potkonjak,Ranjan Roy	2002	14
17	Register transfer level power optimization with emphasis on glitch analysis and reduction IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Anand Raghunathan,S. Dey,Niraj K. Jha	1999	35
18	Nonscan design-for-testability techniques using RT-level design information IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·S. Dey,Miodrag Potkonjak	1997	11
19	Controller re-specification to minimize switching activity in controller/data path circuits Anand Raghunathan,S. Dey,Niraj K. Jha,Katsunori Wakabayashi	1996	10
20	Considering testability at behavioral level: use of transformations for partial scan cost minimization under timing and area constraints IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Miodrag Potkonjak,S. Dey,Ranjan Roy	1995	25

About S. Dey

S. Dey is a scholar working on Hardware and Architecture, Computer Networks and Communications, Electrical and Electronic Engineering, Computer Vision and Pattern Recognition and Software, having authored 141 papers that have together received 3.5k indexed citations. Recurring topics across this work include VLSI and Analog Circuit Testing (57 papers), Embedded Systems Design Techniques (43 papers), Integrated Circuits and Semiconductor Failure Analysis (33 papers), Low-power high-performance VLSI design (30 papers), VLSI and FPGA Design Techniques (26 papers), Radiation Effects in Electronics (21 papers), Interconnection Networks and Systems (19 papers) and Parallel Computing and Optimization Techniques (16 papers). The work is most often cited by research in Hardware and Architecture (2.4k citations), Computer Networks and Communications (1.5k citations), Electrical and Electronic Engineering (2.3k citations), Software (127 citations) and Automotive Engineering (131 citations). S. Dey has collaborated with scholars based in United States, India and Japan. Frequent co-authors include Anand Raghunathan, Kanishka Lahiri, D. Panigrahi, Y. Zorian, Erik Jan Marinissen, Li Chen, Niraj K. Jha, Arijit Mukherjee, Anh Nguyen and Faraydon Karim. Their work appears in journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE Transactions on Mobile Computing, IEEE Journal of Solid-State Circuits and IEEE Access.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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