S. Dey

5.1k total citations · 1 hit paper
141 papers, 3.5k citations indexed

About

S. Dey is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Computer Networks and Communications. According to data from OpenAlex, S. Dey has authored 141 papers receiving a total of 3.5k indexed citations (citations by other indexed papers that have themselves been cited), including 88 papers in Hardware and Architecture, 83 papers in Electrical and Electronic Engineering and 40 papers in Computer Networks and Communications. Recurrent topics in S. Dey's work include VLSI and Analog Circuit Testing (57 papers), Embedded Systems Design Techniques (43 papers) and Integrated Circuits and Semiconductor Failure Analysis (33 papers). S. Dey is often cited by papers focused on VLSI and Analog Circuit Testing (57 papers), Embedded Systems Design Techniques (43 papers) and Integrated Circuits and Semiconductor Failure Analysis (33 papers). S. Dey collaborates with scholars based in United States, India and Japan. S. Dey's co-authors include Anand Raghunathan, Kanishka Lahiri, D. Panigrahi, Y. Zorian, Erik Jan Marinissen, Li Chen, Niraj K. Jha, Arijit Mukherjee, Anh Nguyen and Faraydon Karim and has published in prestigious journals such as IEEE Access, IEEE Journal of Solid-State Circuits and Computer.

In The Last Decade

S. Dey

134 papers receiving 3.2k citations

Hit Papers

Testing embedded-core based system chips 2002 2026 2010 2018 2002 50 100 150 200 250

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
S. Dey United States 29 2.4k 2.3k 1.5k 224 216 141 3.5k
Aviral Shrivastava United States 25 1.5k 0.6× 815 0.4× 1.1k 0.8× 118 0.5× 145 0.7× 173 2.1k
Alireza Ejlali Iran 29 1.2k 0.5× 1.3k 0.6× 966 0.7× 84 0.4× 89 0.4× 137 2.2k
Massimo Poncino Italy 34 2.1k 0.9× 3.0k 1.3× 1.3k 0.9× 232 1.0× 306 1.4× 379 4.6k
John Paul Shen United States 28 2.8k 1.2× 1.9k 0.8× 1.7k 1.1× 55 0.2× 79 0.4× 101 3.5k
Siva Kumar Sastry Hari United States 24 878 0.4× 1.4k 0.6× 660 0.5× 102 0.5× 249 1.2× 50 2.0k
Tony Givargis United States 23 1.1k 0.5× 710 0.3× 697 0.5× 218 1.0× 83 0.4× 117 2.0k
Francisco J. Cazorla Spain 32 2.9k 1.2× 590 0.3× 1.8k 1.2× 168 0.8× 92 0.4× 235 3.4k
C.M. Krishna United States 23 1.2k 0.5× 783 0.3× 901 0.6× 107 0.5× 47 0.2× 119 1.9k
Pedro Reviriego Spain 26 1.3k 0.5× 2.3k 1.0× 1.3k 0.9× 69 0.3× 122 0.6× 331 3.2k
Rolf Ernst Germany 35 4.6k 1.9× 807 0.4× 2.8k 1.9× 264 1.2× 138 0.6× 378 5.3k

Countries citing papers authored by S. Dey

Since Specialization
Citations

This map shows the geographic impact of S. Dey's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by S. Dey with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites S. Dey more than expected).

Fields of papers citing papers by S. Dey

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by S. Dey. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by S. Dey. The network helps show where S. Dey may publish in the future.

Co-authorship network of co-authors of S. Dey

This figure shows the co-authorship network connecting the top 25 collaborators of S. Dey. A scholar is included among the top collaborators of S. Dey based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with S. Dey. S. Dey is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Dey, S., et al.. (2024). Implicit Neural Representation For Accurate CFD Flow Field Prediction. 2 indexed citations
2.
3.
Dey, S., Pallab Dasgupta, & P. P. Chakrabarti. (2023). DietCNN: Multiplication-free Inference for Quantized CNNs. 2. 1–8.
4.
Dey, S., et al.. (2023). Generating Tiny Deep Neural Networks for ECG Classification on Micro-Controllers. 392–397. 6 indexed citations
5.
Dey, S., et al.. (2023). TinyPuff: Automated design of Tiny Smoking Puff Classifiers for Body Worn Devices. 7–12. 5 indexed citations
6.
Dey, S., et al.. (2023). Challenges of Accurate and Efficient AutoML. 1834–1839. 1 indexed citations
7.
Mukherjee, Arijit, et al.. (2022). Accelerated Fire Detection and Localization at Edge. ACM Transactions on Embedded Computing Systems. 21(6). 1–27. 5 indexed citations
8.
Dey, S., Pallab Dasgupta, & P. P. Chakrabarti. (2022). SymDNN: Simple & Effective Adversarial Robustness for Embedded Systems. 2022 IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops (CVPRW). 3598–3608. 2 indexed citations
9.
Mukherjee, Arijit, et al.. (2022). TinyML Techniques for running Machine Learning models on Edge Devices. 1–2. 1 indexed citations
10.
Meena, Kiran, et al.. (2009). HYPOGLYCEMIC AND ANTIHYPERLIPIDAEMIC EFFECT OF ETHANOLIC EXTRACT OF AERIAL PARTS OF AERVA LANATA LINN. IN NORMAL AND ALLOXAN INDUCED DIABETIC RATS. International Journal of Pharmaceutical Sciences and Drug Research. 191–194. 11 indexed citations
11.
Zhao, Chong, S. Dey, & Xiaoliang Bai. (2005). Soft-Spot Analysis: Targeting Compound Noise Effects in Nanometer Circuits. IEEE Design & Test of Computers. 22(4). 362–375. 13 indexed citations
12.
Lahiri, Kanishka, Anand Raghunathan, S. Dey, & D. Panigrahi. (2003). Battery-driven system design: a new frontier in low power design. 261–267. 182 indexed citations
13.
Lahiri, Kanishka, Anand Raghunathan, S. Dey, & D. Panigrahi. (2002). Battery-Driven System Design: A New Frontier in Low Power Design. Asia and South Pacific Design Automation Conference. 261–267. 232 indexed citations
14.
Potkonjak, Miodrag, S. Dey, & Ken‐ichi Wakabayashi. (2002). Design-for-Debugging of application specific designs. 295–301. 5 indexed citations
15.
Lahiri, Kanishka, Anand Raghunathan, & S. Dey. (2002). Performance analysis of systems with multi-channel communication architectures. 530–537. 28 indexed citations
16.
Dey, S., Miodrag Potkonjak, & Ranjan Roy. (2002). Exploiting hardware sharing in high-level synthesis for partial scan optimization. 20–25. 14 indexed citations
17.
Raghunathan, Anand, S. Dey, & Niraj K. Jha. (1999). Register transfer level power optimization with emphasis on glitch analysis and reduction. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 18(8). 1114–1131. 35 indexed citations
18.
Dey, S. & Miodrag Potkonjak. (1997). Nonscan design-for-testability techniques using RT-level design information. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 16(12). 1488–1506. 11 indexed citations
19.
Raghunathan, Anand, S. Dey, Niraj K. Jha, & Katsunori Wakabayashi. (1996). Controller re-specification to minimize switching activity in controller/data path circuits. 301–304. 10 indexed citations
20.
Potkonjak, Miodrag, S. Dey, & Ranjan Roy. (1995). Considering testability at behavioral level: use of transformations for partial scan cost minimization under timing and area constraints. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 14(5). 531–546. 25 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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