Naifeng Jing

1.2k total citations
113 papers, 853 citations indexed

About

Naifeng Jing is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, Naifeng Jing has authored 113 papers receiving a total of 853 indexed citations (citations by other indexed papers that have themselves been cited), including 63 papers in Electrical and Electronic Engineering, 51 papers in Hardware and Architecture and 33 papers in Computer Networks and Communications. Recurrent topics in Naifeng Jing's work include Parallel Computing and Optimization Techniques (33 papers), Advanced Memory and Neural Computing (24 papers) and Interconnection Networks and Systems (24 papers). Naifeng Jing is often cited by papers focused on Parallel Computing and Optimization Techniques (33 papers), Advanced Memory and Neural Computing (24 papers) and Interconnection Networks and Systems (24 papers). Naifeng Jing collaborates with scholars based in China, United States and Hong Kong. Naifeng Jing's co-authors include Xiaoyao Liang, Zhigang Mao, Li Jiang, Guanghui He, Jianfei Jiang, Zhuoran Song, Qin Wang, Hai‐Bao Chen, Weiguang Sheng and Yao Lu and has published in prestigious journals such as Expert Systems with Applications, International Journal of Remote Sensing and Remote Sensing.

In The Last Decade

Naifeng Jing

97 papers receiving 837 citations

Peers

Naifeng Jing
Richard Kleihorst Netherlands
Liangzhen Lai United States
Nitya Ranganathan United States
Eunhyeok Park South Korea
Tughrul Arslan United Kingdom
Kyle Rupnow United States
Hengzhu Liu China
Lingzhi Sui China
Hakan Yalcin United States
Richard Kleihorst Netherlands
Naifeng Jing
Citations per year, relative to Naifeng Jing Naifeng Jing (= 1×) peers Richard Kleihorst

Countries citing papers authored by Naifeng Jing

Since Specialization
Citations

This map shows the geographic impact of Naifeng Jing's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Naifeng Jing with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Naifeng Jing more than expected).

Fields of papers citing papers by Naifeng Jing

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Naifeng Jing. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Naifeng Jing. The network helps show where Naifeng Jing may publish in the future.

Co-authorship network of co-authors of Naifeng Jing

This figure shows the co-authorship network connecting the top 25 collaborators of Naifeng Jing. A scholar is included among the top collaborators of Naifeng Jing based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Naifeng Jing. Naifeng Jing is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
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Jing, Naifeng, et al.. (2025). A Hierarchical 3-D Physical Design Method for Ultralarge-Scale Logic-on-Memory CGRA Chip. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 33(6). 1502–1515.
3.
Li, Xiaoyan, et al.. (2025). Efficient Die-to-Die Communication: UCIe Link Simulation and Optimization in a Chiplet-Based System. IEEE Journal on Emerging and Selected Topics in Circuits and Systems. 15(4). 599–608.
4.
Wang, Qin, et al.. (2024). A novel vehicle collision detection system: Integrating audio-visual fusion for enhanced performance. Expert Systems with Applications. 249. 123828–123828. 1 indexed citations
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Song, Zhuoran, Rachata Ausavarungnirun, Xiao Liu, et al.. (2024). Janus: A Flexible Processing-in-Memory Graph Accelerator Toward Sparsity. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 43(12). 4813–4826.
8.
Jiang, Jianfei, et al.. (2024). RecPIM: Efficient In-Memory Processing for Personalized Recommendation Inference Using Near-Bank Architecture. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 43(10). 2854–2867. 2 indexed citations
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Song, Zhuoran, et al.. (2024). CMC: Video Transformer Acceleration via CODEC Assisted Matrix Condensing. 201–215. 3 indexed citations
11.
Zhang, Zihan, et al.. (2023). 3A-ReRAM: Adaptive Activation Accumulation in ReRAM-Based CNN Accelerator. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 43(1). 176–188. 3 indexed citations
12.
Wang, Qin, et al.. (2022). A Low Coupling and Lightweight Algorithm for Ship Detection in Optical Remote Sensing Images. IEEE Geoscience and Remote Sensing Letters. 19. 1–5. 10 indexed citations
13.
Jiang, Jianfei, et al.. (2022). An Efficient CNN Accelerator Using Inter-Frame Data Reuse of Videos on FPGAs. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 30(11). 1587–1600. 16 indexed citations
14.
Zhang, Zihan, Jianfei Jiang, Yongxin Zhu, et al.. (2021). A Universal RRAM-Based DNN Accelerator With Programmable Crossbars Beyond MVM Operator. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 41(7). 2094–2106. 1 indexed citations
15.
Sun, Yanan, Weifeng He, Qin Wang, et al.. (2019). Energy-Efficient Nonvolatile SRAM Design Based on Resistive Switching Multi-Level Cells. IEEE Transactions on Circuits & Systems II Express Briefs. 66(5). 753–757. 18 indexed citations
16.
Jiang, Li, et al.. (2017). Incorporating selective victim cache into GPGPU for high‐performance computing. Concurrency and Computation Practice and Experience. 29(24). 3 indexed citations
17.
Wang, Qin, et al.. (2017). IBOM: An Integrated and Balanced On-Chip Memory for High Performance GPGPUs. IEEE Transactions on Parallel and Distributed Systems. 29(3). 586–599. 4 indexed citations
18.
Jing, Naifeng, et al.. (2015). Redundancy based Interconnect Duplication to Mitigate Soft Errors in SRAM-based FPGAs. International Conference on Computer Aided Design. 764–769.
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Jing, Naifeng, et al.. (2013). Compiler assisted dynamic register file in GPGPU. 3–8. 18 indexed citations
20.
Jing, Naifeng, et al.. (2011). Mitigating FPGA interconnect soft errors by in-place LUT inversion. International Conference on Computer Aided Design. 582–586. 12 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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