Yuanwu Lei

627 total citations
40 papers, 427 citations indexed

About

Yuanwu Lei is a scholar working on Hardware and Architecture, Computational Theory and Mathematics and Signal Processing. According to data from OpenAlex, Yuanwu Lei has authored 40 papers receiving a total of 427 indexed citations (citations by other indexed papers that have themselves been cited), including 21 papers in Hardware and Architecture, 20 papers in Computational Theory and Mathematics and 19 papers in Signal Processing. Recurrent topics in Yuanwu Lei's work include Parallel Computing and Optimization Techniques (21 papers), Numerical Methods and Algorithms (20 papers) and Digital Filter Design and Implementation (18 papers). Yuanwu Lei is often cited by papers focused on Parallel Computing and Optimization Techniques (21 papers), Numerical Methods and Algorithms (20 papers) and Digital Filter Design and Implementation (18 papers). Yuanwu Lei collaborates with scholars based in China and Sweden. Yuanwu Lei's co-authors include Yong Dou, Yueqing Wang, Jie Zhou, Kai Xu, Zhonghai Lu, Tingting He, Yuanxi Peng, Xinwang Liu, Yaohua Wang and Xin Niu and has published in prestigious journals such as IEEE Access, Neurocomputing and IEEE Geoscience and Remote Sensing Letters.

In The Last Decade

Yuanwu Lei

38 papers receiving 404 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Yuanwu Lei China 13 131 122 121 98 93 40 427
K. Wiatr Poland 11 101 0.8× 109 0.9× 76 0.6× 44 0.4× 74 0.8× 87 386
A. Wu Hong Kong 12 223 1.7× 196 1.6× 79 0.7× 58 0.6× 87 0.9× 54 507
Van‐Phuc Hoang Vietnam 11 184 1.4× 196 1.6× 87 0.7× 42 0.4× 93 1.0× 85 472
Yoshiki Yamaguchi Japan 11 154 1.2× 141 1.2× 211 1.7× 28 0.3× 180 1.9× 77 570
D.E. Van den Bout United States 9 164 1.3× 315 2.6× 93 0.8× 37 0.4× 98 1.1× 23 552
M. B. Srinivas India 15 318 2.4× 171 1.4× 45 0.4× 123 1.3× 85 0.9× 87 685
Chao Cheng United States 11 177 1.4× 63 0.5× 41 0.3× 67 0.7× 44 0.5× 23 432

Countries citing papers authored by Yuanwu Lei

Since Specialization
Citations

This map shows the geographic impact of Yuanwu Lei's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Yuanwu Lei with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Yuanwu Lei more than expected).

Fields of papers citing papers by Yuanwu Lei

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Yuanwu Lei. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Yuanwu Lei. The network helps show where Yuanwu Lei may publish in the future.

Co-authorship network of co-authors of Yuanwu Lei

This figure shows the co-authorship network connecting the top 25 collaborators of Yuanwu Lei. A scholar is included among the top collaborators of Yuanwu Lei based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Yuanwu Lei. Yuanwu Lei is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Lu, Kai, Yaohua Wang, Yang Guo, et al.. (2022). MT-3000: a heterogeneous multi-zone processor for HPC. 4(2). 150–164. 29 indexed citations
2.
Wang, Pengfei, Yuanwu Lei, & Yong Dou. (2019). Pair-HMM accelerator based on non-cooperative structure. IEICE Electronics Express. 16(15). 20190402–20190402. 2 indexed citations
3.
Ma, Sheng, Libo Huang, Yuanwu Lei, Yang Guo, & Zhiying Wang. (2019). An Efficient Direct Memory Access (DMA) Controller for Scientific Computing Accelerators. 1–5. 5 indexed citations
4.
Lei, Yuanwu, et al.. (2019). Pipelined Range Reduction Based Truncated Multiplier. Chinese Journal of Electronics. 28(6). 1158–1164. 1 indexed citations
5.
Peng, Yuanxi, et al.. (2017). Low‐Latency SRT Division and Square Root Based on Remainder and Quotient Prediction. Chinese Journal of Electronics. 26(1). 58–64. 2 indexed citations
6.
He, Tingting, et al.. (2017). High‐Performance FP Divider with Sharing Multipliers Based on Goldschmidt Algorithm. Chinese Journal of Electronics. 26(2). 292–298. 3 indexed citations
7.
Lei, Yuanwu, et al.. (2016). Low Latency and Low Error Floating-Point Sine/Cosine Function Based TCORDIC Algorithm. IEEE Transactions on Circuits and Systems I Regular Papers. 64(4). 892–905. 15 indexed citations
8.
Chen, Xiaowen, et al.. (2016). Multi-bit transient fault control for NoC links using 2D fault coding method. 1–8. 17 indexed citations
9.
Lv, Qi, et al.. (2016). Classification of Hyperspectral Remote Sensing Image Using Hierarchical Local-Receptive-Field-Based Extreme Learning Machine. IEEE Geoscience and Remote Sensing Letters. 1–5. 37 indexed citations
10.
Lei, Yuanwu, et al.. (2016). Configurable Floating‐Point FFT Accelerator on FPGA Based Multiple‐Rotation CORDIC. Chinese Journal of Electronics. 25(6). 1063–1070. 20 indexed citations
11.
Zhou, Tong, Song Guo, Yuanwu Lei, & Yong Dou. (2015). Area-efficient high-throughput sorted QR decomposition-based MIMO detector on FPGA. 394–398. 6 indexed citations
12.
Wang, Yueqing, Yong Dou, Xinwang Liu, & Yuanwu Lei. (2015). PR-ELM: Parallel regularized extreme learning machine based on cluster. Neurocomputing. 173. 1073–1081. 37 indexed citations
13.
Dou, Yong, et al.. (2015). A deeply-pipelined FPGA-based SpMV accelerator with a hardware-friendly storage scheme. IEICE Electronics Express. 12(11). 20150161–20150161. 3 indexed citations
14.
Guo, Lei, Yuhua Tang, Yuanwu Lei, Yong Dou, & Jie Zhou. (2014). Transpose-free variable-size FFT accelerator based on-chip SRAM. IEICE Electronics Express. 11(15). 20140171–20140171. 4 indexed citations
15.
Lei, Yuanwu, et al.. (2013). FPGA implementation of an exact dot product and its application in variable-precision floating-point arithmetic. The Journal of Supercomputing. 64(2). 580–605. 4 indexed citations
16.
Tang, Yuhua, et al.. (2013). Window Memory Layout Scheme for Alternate Row-Wise/Column-Wise Matrix Access. IEICE Transactions on Information and Systems. E96.D(12). 2765–2775. 1 indexed citations
17.
Zhou, Jie, et al.. (2010). Window memory accesses method in alternate row/column matrix access systems. V3–201. 5 indexed citations
18.
Dou, Yong, et al.. (2010). A Unified Co-Processor Architecture for Matrix Decomposition. Journal of Computer Science and Technology. 25(4). 874–885. 4 indexed citations
19.
Dou, Yong, et al.. (2009). A Fine-grained Pipelined Implementation of the LINPACK Benchmark on FPGAs. 183–190. 13 indexed citations
20.
Zhou, Jie, et al.. (2008). Dynamic Configurable Floating-Point FFT Pipelines and Hybrid-Mode CORDIC on FPGA. 616–620. 12 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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