Mohammad Hosseinabady

587 citations

47 papers · 440 indexed · h-index 13

Impact in

Hardware and Architecture top 2%
- VLSI and Analog Circuit Testing
- Embedded Systems Design Techniques
- Parallel Computing and Optimization Techniques
Computer Networks and Communications top 5%
- Interconnection Networks and Systems

Papers in

Hardware and Architecture 38
- Embedded Systems Design Techniques 22
- VLSI and Analog Circuit Testing 18
- Parallel Computing and Optimization Techniques 13
Software 3

Co-authors: Jose Nunez‐Yanez Zainalabedin Navabi Jimson Mathew Dhiraj K. Pradhan Mohammad Reza Kakoee Mahdi Nazm Bojnordi Ali Afzali‐Kusha Rafael Asenjo
Journals: IEEE Transactions on Computers (2 papers)IEEE Transactions on Very Large Scale Integration (VLSI) Systems (1 paper)Array (1 paper)IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1 paper)ACM Transactions on Embedded Computing Systems (1 paper)
Partner nations: United Kingdom Iran United States

In The Last Decade

Mohammad Hosseinabady

46 papers receiving 419 citations

Peers

Countries citing papers authored by Mohammad Hosseinabady

Since Specialization

Citations

This map shows the geographic impact of Mohammad Hosseinabady's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Mohammad Hosseinabady with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Mohammad Hosseinabady more than expected).

Fields of papers citing papers by Mohammad Hosseinabady

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Mohammad Hosseinabady. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Mohammad Hosseinabady. The network helps show where Mohammad Hosseinabady may publish in the future.

Co-authors

The 21 scholars most cited alongside Mohammad Hosseinabady, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with Mohammad Hosseinabady Line = papers co-authored together Mohammad Hosseinabady links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

#	Work
1	Sparse and dense matrix multiplication hardware for heterogeneous multi-precision neural networks Array ·Jose Nunez‐Yanez, Mohammad Hosseinabady	2021	4
2	Run-Time Power Modelling in Embedded GPUs with Dynamic Voltage and Frequency Scaling Explore Bristol Research ·Jose Nunez‐Yanez, Kris Nikov, Kerstin Eder, Mohammad Hosseinabady	2020	2
3	Dynamic Energy Management of FPGA Accelerators in Embedded Systems ACM Transactions on Embedded Computing Systems ·Mohammad Hosseinabady, Jose Nunez‐Yanez	2018	7
4	A systematic approach to design and optimise streaming applications on FPGA using high-level synthesis Bristol Research (University of Bristol) ·Mohammad Hosseinabady, Jose Nunez‐Yanez	2017	6
5	Run-time power gating in hybrid ARM-FPGA devices Explore Bristol Research ·Mohammad Hosseinabady, Jose Nunez‐Yanez	2014	23
6	Run-time stochastic task mapping on a large scale network-on-chip with dynamically reconfigurable tiles IET Computers & Digital Techniques ·Mohammad Hosseinabady, Jose Nunez‐Yanez	2012	9
7	Effective modelling of large NoCs using SystemC Mohammad Hosseinabady, Jose Nunez‐Yanez	2010	1
8	Low Latency and Energy Efficient Scalable Architecture for Massive NoCs Using Generalized de Bruijn Graph IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Mohammad Hosseinabady, Mohammad Reza Kakoee, Jimson Mathew, Dhiraj K. Pradhan	2010	11
9	SystemC architectural transaction level modelling for large NoCs Mohammad Hosseinabady, Jose Nunez‐Yanez	2010	4
10	International Conference on Application-Specific Systems, Architectures and Processors (ASAP2008), Leuven, Belgium Mohammad Hosseinabady, Jose Nunez‐Yanez	2008	9
11	De Bruijn Graph as a Low Latency Scalable Architecture for Energy Efficient Massive NoCs 2008 Design, Automation and Test in Europe ·Mohammad Hosseinabady, Mohammad Reza Kakoee, Jimson Mathew, Dhiraj K. Pradhan	2008	2
12	A Selective Trigger Scan Architecture for VLSI Testing IEEE Transactions on Computers ·Mohammad Hosseinabady, Shervin Sharifi, Fabrizio Lombardi, Zainalabedin Navabi	2008	1
13	Using the inter- and intra-switch regularity in NoC switch testing Design, Automation, and Test in Europe ·Mohammad Hosseinabady, Atefe Dalirsani, Zainalabedin Navabi	2007	27
14	Low test application time resource binding for behavioral synthesis ACM Transactions on Design Automation of Electronic Systems ·Mohammad Hosseinabady, Pejman Lotfi-Kamran, Zainalabedin Navabi	2007	0
15	Reliable network-on-chip based on generalized de Bruijn graph Mohammad Hosseinabady, Mohammad Reza Kakoee, Jimson Mathew, Dhiraj K. Pradhan	2007	18
16	An Analytical Model for Reliability Evaluation of NoC Architectures Atefe Dalirsani, Mohammad Hosseinabady, Zainalabedin Navabi	2007	21
17	Using the Inter- and Intra-Switch Regularity in NoC Switch Testing Mohammad Hosseinabady, Atefe Dalirsani, Zainalabedin Navabi	2007	17
18	Single-Event Upset Analysis and Protection in High Speed Circuits Mohammad Hosseinabady, Pejman Lotfi-Kamran, Giorgio Di Natale, Stefano Di Carlo, Alfredo Benso, P. Prinetto	2006	6
19	A Flow Graph Technique for DFT Controller Modification Mohammad Hosseinabady, Pejman Lotfi-Kamran, P. Riahi, Fabrizio Lombardi, Zainalabedin Navabi	2005	1
20	Simultaneous Reduction of Dynamic and Static Power in Scan Structures Design, Automation, and Test in Europe ·S. Sharifi, Javid Jaffari, Mohammad Hosseinabady, Ali Afzali‐Kusha, Z. Navabi	2005	26

About Mohammad Hosseinabady

Mohammad Hosseinabady is a scholar working on Hardware and Architecture, Software, Computer Networks and Communications, Electrical and Electronic Engineering and Computer Vision and Pattern Recognition, having authored 47 papers that have together received 440 indexed citations. Recurring topics across this work include Embedded Systems Design Techniques (22 papers), Interconnection Networks and Systems (18 papers), VLSI and Analog Circuit Testing (18 papers), Parallel Computing and Optimization Techniques (13 papers), Radiation Effects in Electronics (10 papers), Low-power high-performance VLSI design (8 papers), Integrated Circuits and Semiconductor Failure Analysis (7 papers) and VLSI and FPGA Design Techniques (6 papers). The work is most often cited by research in Hardware and Architecture (310 citations), Computer Networks and Communications (253 citations), Electrical and Electronic Engineering (260 citations), Computational Mathematics (2 citations) and Computer Vision and Pattern Recognition (26 citations). Mohammad Hosseinabady has collaborated with scholars based in United Kingdom, Iran and United States. Frequent co-authors include Jose Nunez‐Yanez, Zainalabedin Navabi, Jimson Mathew, Dhiraj K. Pradhan, Mohammad Reza Kakoee, Mahdi Nazm Bojnordi, Ali Afzali‐Kusha, Rafael Asenjo, Jawar Singh and Ángeles Navarro. Their work appears in journals such as IEEE Transactions on Computers, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Array, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and ACM Transactions on Embedded Computing Systems.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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