Masato Edahiro
About
In The Last Decade
Masato Edahiro
79 papers receiving 873 citations
Peers
Comparison fields: 5 of 71
- Hardware and Architecture 503
- Electrical and Electronic Engineering 466
- Computer Networks and Communications 305
- Computer Vision and Pattern Recognition 160
- Artificial Intelligence 104
Countries citing papers authored by Masato Edahiro
This map shows the geographic impact of Masato Edahiro's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Masato Edahiro with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Masato Edahiro more than expected).
Fields of papers citing papers by Masato Edahiro
This network shows the impact of papers produced by Masato Edahiro. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Masato Edahiro. The network helps show where Masato Edahiro may publish in the future.
Co-authorship network of co-authors of Masato Edahiro
This figure shows the co-authorship network connecting the top 25 collaborators of Masato Edahiro. A scholar is included among the top collaborators of Masato Edahiro based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Masato Edahiro. Masato Edahiro is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 0 | |
| 2 | 1 | |
| 3 | 2 | |
| 4 | 11 | |
| 5 | 4 | |
| 6 | 2 | |
| 7 | 20 | |
| 8 | 28 | |
| 9 | 55 | |
| 10 | A Channel-based Communication/Synchronization Model for SW-HW Multitasking on Dynamically Partially Reconfigurable FPGAs | 1 |
| 11 | 8 | |
| 12 | Fastest multi-scalar multiplication based on optimal double-base chains | 2 |
| 13 | Fast elliptic curve cryptography using minimal weight conversion of d integers | 2 |
| 14 | Parallel C code generation from Simulink models | 1 |
| 15 | 11 | |
| 16 | M P M H-E E A | 0 |
| 17 | Map Sort: A Scalable Sorting Algorithm for Multi-Core Processors | 3 |
| 18 | Practical Efficiencies of Planar Point Location Algorithms (Special Section on Discrete Mathematics and Its Applications) | 1 |
| 19 | Minimum skew and minimum path length routing in VLSI layout design | 48 |
| 20 | A New Bucketing Technique for Automatic / Interactive Layout Design | 2 |
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.