Marc A. Viredaz
About
In The Last Decade
Marc A. Viredaz
20 papers receiving 335 citations
Peers
Comparison fields: 5 of 48
- Electrical and Electronic Engineering 184
- Computer Networks and Communications 156
- Hardware and Architecture 146
- Artificial Intelligence 86
- Computer Vision and Pattern Recognition 70
Countries citing papers authored by Marc A. Viredaz
This map shows the geographic impact of Marc A. Viredaz's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Marc A. Viredaz with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Marc A. Viredaz more than expected).
Fields of papers citing papers by Marc A. Viredaz
This network shows the impact of papers produced by Marc A. Viredaz. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Marc A. Viredaz. The network helps show where Marc A. Viredaz may publish in the future.
Co-authorship network of co-authors of Marc A. Viredaz
This figure shows the co-authorship network connecting the top 25 collaborators of Marc A. Viredaz. A scholar is included among the top collaborators of Marc A. Viredaz based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Marc A. Viredaz. Marc A. Viredaz is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 2 | |
| 2 | 37 | |
| 3 | 46 | |
| 4 | 67 | |
| 5 | 2 | |
| 6 | 62 | |
| 7 | The Itsy Pocket Computer | 13 |
| 8 | Power Evaluation of Itsy Version 2.3 | 10 |
| 9 | The Itsy Pocket Computer Version 1.5: User's Manual | 20 |
| 10 | GENES IV: A Bit-Serial Processing Element for a Multi-Model Neural-Network Accelerator | 2 |
| 11 | 23 | |
| 12 | 7 | |
| 13 | A Systolic Accelerator for Power System Security Assessment | 3 |
| 14 | 35 | |
| 15 | 29 | |
| 16 | Bit-Serial Input and Output Multipliers and Squarers | 1 |
| 17 | 4 | |
| 18 | 3 | |
| 19 | 2 | |
| 20 | 11 |
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.