Luca Bertulessi

768 total citations
36 papers, 572 citations indexed

About

Luca Bertulessi is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Artificial Intelligence. According to data from OpenAlex, Luca Bertulessi has authored 36 papers receiving a total of 572 indexed citations (citations by other indexed papers that have themselves been cited), including 36 papers in Electrical and Electronic Engineering, 16 papers in Biomedical Engineering and 1 paper in Artificial Intelligence. Recurrent topics in Luca Bertulessi's work include Advancements in PLL and VCO Technologies (27 papers), Radio Frequency Integrated Circuit Design (21 papers) and Analog and Mixed-Signal Circuit Design (15 papers). Luca Bertulessi is often cited by papers focused on Advancements in PLL and VCO Technologies (27 papers), Radio Frequency Integrated Circuit Design (21 papers) and Analog and Mixed-Signal Circuit Design (15 papers). Luca Bertulessi collaborates with scholars based in Italy, Austria and United States. Luca Bertulessi's co-authors include Carlo Samori, Salvatore Levantino, Dmytro Cherniak, Andrea L. Lacaita, Mario Mercandelli, Alessio Santiccioli, Luigi Grimaldi, Roberto Nonis, Andrea Bonfanti and Andrea Bevilacqua and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Circuits and Systems I Regular Papers and IEEE Microwave and Wireless Components Letters.

In The Last Decade

Luca Bertulessi

35 papers receiving 565 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
Luca Bertulessi Italy	16	557	155	16	15	11	36	572
Dmytro Cherniak Austria	16	598 1.1×	145 0.9×	16 1.0×	16 1.1×	10 0.9×	32	612
Chih-Wei Yao United States	11	490 0.9×	156 1.0×	13 0.8×	8 0.5×	15 1.4×	23	520
Zheng Sun Japan	11	396 0.7×	135 0.9×	18 1.1×	20 1.3×	12 1.1×	47	418
Nereo Markulić Belgium	16	570 1.0×	293 1.9×	17 1.1×	12 0.8×	5 0.5×	34	589
Zhenghao Lu China	8	414 0.7×	158 1.0×	12 0.8×	29 1.9×	7 0.6×	48	433
Sang Won Son South Korea	8	375 0.7×	111 0.7×	8 0.5×	5 0.3×	7 0.6×	11	383
Giovanni Marzin Italy	9	645 1.2×	246 1.6×	11 0.7×	8 0.5×	5 0.5×	12	650
Aaron Buchwald United States	9	397 0.7×	269 1.7×	17 1.1×	7 0.5×	7 0.6×	25	414
Alessio Santiccioli Italy	13	399 0.7×	113 0.7×	13 0.8×	5 0.3×	8 0.7×	18	404
Ahmed Elkholy United States	17	771 1.4×	332 2.1×	20 1.3×	18 1.2×	7 0.6×	43	786

Countries citing papers authored by Luca Bertulessi

Since Specialization

Citations

This map shows the geographic impact of Luca Bertulessi's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Luca Bertulessi with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Luca Bertulessi more than expected).

Fields of papers citing papers by Luca Bertulessi

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Luca Bertulessi. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Luca Bertulessi. The network helps show where Luca Bertulessi may publish in the future.

Co-authorship network of co-authors of Luca Bertulessi

This figure shows the co-authorship network connecting the top 25 collaborators of Luca Bertulessi. A scholar is included among the top collaborators of Luca Bertulessi based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Luca Bertulessi. Luca Bertulessi is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

Bertulessi, Luca, et al.. (2024). A 2-GS/s Time-Interleaved ADC With Embedded Background Calibrations and a Novel Reference Buffer for Reduced Inter-Channel Crosstalk. IEEE Journal of Solid-State Circuits. 60(2). 456–468. 4 indexed citations

Bertulessi, Luca, et al.. (2023). A Novel Push-Pull Input Buffer for Wideband ADCs with Improved High-Frequency Linearity. Virtual Community of Pathological Anatomy (University of Castilla La Mancha). 1–5. 5 indexed citations

Santiccioli, Alessio, et al.. (2023). A Novel LO Phase-Shifting System Based on Digital Bang-Bang PLLs With Background Phase-Offset Correction for Integrated Phased Arrays. IEEE Journal of Solid-State Circuits. 58(9). 2466–2477. 8 indexed citations

Bertulessi, Luca, et al.. (2023). A 2GS/s 11b 8x Interleaved ADC with 9.2 ENOB and 69.9dB SFDR in 28nm CMOS. Virtual Community of Pathological Anatomy (University of Castilla La Mancha). 1–2. 5 indexed citations

Cherniak, Dmytro, et al.. (2023). 4.5 A 9.25GHz Digital PLL with Fractional-Spur Cancellation Based on a Multi-DTC Topology. Virtual Community of Pathological Anatomy (University of Castilla La Mancha). 82–84. 24 indexed citations

Santiccioli, Alessio, Dmytro Cherniak, Luca Bertulessi, et al.. (2022). A 72-fs-Total-Integrated-Jitter Two-Core Fractional-N Digital PLL With Digital Period Averaging Calibration on Frequency Quadrupler and True-in-Phase Combiner. IEEE Journal of Solid-State Circuits. 58(3). 634–646. 8 indexed citations

Bertulessi, Luca, Dmytro Cherniak, Mario Mercandelli, et al.. (2022). Novel Feed-Forward Technique for Digital Bang-Bang PLL to Achieve Fast Lock and Low Phase Noise. IEEE Transactions on Circuits and Systems I Regular Papers. 69(5). 1858–1870. 6 indexed citations

Bertulessi, Luca, Mario Mercandelli, Andrea L. Lacaita, et al.. (2022). A 900-MS/s SAR-Based Time-Interleaved ADC With a Fully Programmable Interleaving Factor and On-Chip Scalable Background Calibrations. IEEE Transactions on Circuits & Systems II Express Briefs. 69(9). 3645–3649. 10 indexed citations

Santiccioli, Alessio, Dmytro Cherniak, Luca Bertulessi, et al.. (2022). A Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching Achieving 68.6 fs-rms-Total-Integrated-Jitter and 1.56 μs-Locking-Time. IEEE Journal of Solid-State Circuits. 57(12). 3538–3551. 29 indexed citations

10.

Mercandelli, Mario, Luca Bertulessi, Carlo Samori, & Salvatore Levantino. (2022). A Digital PLL With Multitap LMS-Based Bandwidth Control. IEEE Solid-State Circuits Letters. 5. 126–129. 4 indexed citations

11.

Mercandelli, Mario, Alessio Santiccioli, Luca Bertulessi, et al.. (2021). A 12.5-GHz Fractional-N Type-I Sampling PLL Achieving 58-fs Integrated Jitter. IEEE Journal of Solid-State Circuits. 57(2). 505–517. 41 indexed citations

12.

Mercandelli, Mario, et al.. (2021). Self-Biasing Dynamic Startup Circuit for Current-Biased Class-C Oscillators. IEEE Microwave and Wireless Components Letters. 31(9). 1075–1078. 3 indexed citations

13.

Mercandelli, Mario, Alessio Santiccioli, Luca Bertulessi, et al.. (2021). A 12.9-to-15.1-GHz Digital PLL Based on a Bang-Bang Phase Detector With Adaptively Optimized Noise Shaping. IEEE Journal of Solid-State Circuits. 57(6). 1723–1735. 21 indexed citations

14.

Santiccioli, Alessio, Mario Mercandelli, Luca Bertulessi, et al.. (2020). A 66-fs-rms Jitter 12.8-to-15.2-GHz Fractional-N Bang–Bang PLL With Digital Frequency-Error Recovery for Fast Locking. IEEE Journal of Solid-State Circuits. 55(12). 3349–3361. 65 indexed citations

15.

Mercandelli, Mario, Alessio Santiccioli, Luca Bertulessi, et al.. (2020). 17.5 A 12.5GHz Fractional-N Type-I Sampling PLL Achieving 58fs Integrated Jitter. Virtual Community of Pathological Anatomy (University of Castilla La Mancha). 274–276. 39 indexed citations

16.

Cherniak, Dmytro, Mario Mercandelli, Luca Bertulessi, et al.. (2020). A 250-Mb/s Direct Phase Modulator With −42.4-dB EVM Based on a 14-GHz Digital PLL. IEEE Solid-State Circuits Letters. 3. 126–129. 3 indexed citations

17.

Bertulessi, Luca, et al.. (2019). A 30-GHz Digital Sub-Sampling Fractional-$N$ PLL With −238.6-dB Jitter-Power Figure of Merit in 65-nm LP CMOS. IEEE Journal of Solid-State Circuits. 54(12). 3493–3502. 25 indexed citations

18.

Grimaldi, Luigi, Luca Bertulessi, Dmytro Cherniak, et al.. (2019). 16.7 A 30GHz Digital Sub-Sampling Fractional-N PLL with 198fs<inf>rms</inf> Jitter in 65nm LP CMOS. Virtual Community of Pathological Anatomy (University of Castilla La Mancha). 268–270. 16 indexed citations

19.

Mercandelli, Mario, Luigi Grimaldi, Luca Bertulessi, et al.. (2018). A Background Calibration Technique to Control the Bandwidth of Digital PLLs. IEEE Journal of Solid-State Circuits. 53(11). 3243–3255. 20 indexed citations

20.

Cherniak, Dmytro, Luigi Grimaldi, Luca Bertulessi, et al.. (2018). A 23GHz low-phase-noise digital bang-bang PLL for fast triangular and saw-tooth chirp modulation. Virtual Community of Pathological Anatomy (University of Castilla La Mancha). 248–250. 23 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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