Lan-Chou Cho

494 total citations
22 papers, 399 citations indexed

About

Lan-Chou Cho is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Computer Networks and Communications. According to data from OpenAlex, Lan-Chou Cho has authored 22 papers receiving a total of 399 indexed citations (citations by other indexed papers that have themselves been cited), including 22 papers in Electrical and Electronic Engineering, 4 papers in Biomedical Engineering and 1 paper in Computer Networks and Communications. Recurrent topics in Lan-Chou Cho's work include Radio Frequency Integrated Circuit Design (22 papers), Advancements in PLL and VCO Technologies (17 papers) and Electromagnetic Compatibility and Noise Suppression (4 papers). Lan-Chou Cho is often cited by papers focused on Radio Frequency Integrated Circuit Design (22 papers), Advancements in PLL and VCO Technologies (17 papers) and Electromagnetic Compatibility and Noise Suppression (4 papers). Lan-Chou Cho collaborates with scholars based in Taiwan, Ireland and Netherlands. Lan-Chou Cho's co-authors include Feng-Wei Kuo, Robert Bogdan Staszewski, Chewn-Pu Jou, Fu-Lung Hsueh, Masoud Babaie, Chihun Lee, Shen-Iuan Liu, Mina Shahmohammadi, Massoud Tohidian and Iman Madadi and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Circuits and Systems I Regular Papers and IEEE Transactions on Circuits & Systems II Express Briefs.

In The Last Decade

Lan-Chou Cho

22 papers receiving 382 citations

Peers

Lan-Chou Cho
Younghyun Lim South Korea
C. Persico United States
Taeho Seong South Korea
S. Moloudi United States
Lan-Chou Cho
Citations per year, relative to Lan-Chou Cho Lan-Chou Cho (= 1×) peers K. Vavelidis

Countries citing papers authored by Lan-Chou Cho

Since Specialization
Citations

This map shows the geographic impact of Lan-Chou Cho's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Lan-Chou Cho with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Lan-Chou Cho more than expected).

Fields of papers citing papers by Lan-Chou Cho

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Lan-Chou Cho. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Lan-Chou Cho. The network helps show where Lan-Chou Cho may publish in the future.

Co-authorship network of co-authors of Lan-Chou Cho

This figure shows the co-authorship network connecting the top 25 collaborators of Lan-Chou Cho. A scholar is included among the top collaborators of Lan-Chou Cho based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Lan-Chou Cho. Lan-Chou Cho is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Kuo, Feng-Wei, Zhirui Zong, Lan-Chou Cho, et al.. (2019). A 77/79-GHz Frequency Generator in 16-nm CMOS for FMCW Radar Applications Based on a 26-GHz Oscillator with Co-Generated Third Harmonic. Research Repository (Delft University of Technology). 53. 53–56. 5 indexed citations
2.
Xu, Kai, Feng-Wei Kuo, Lan-Chou Cho, et al.. (2019). A 0.85mm2 51%-Efficient 11-dBm Compact DCO-DPA in 16-nm FinFET for Sub-Gigahertz IoT TX Using HD2 Self-Suppression and Pulling Mitigation. IEEE Journal of Solid-State Circuits. 54(7). 2028–2037. 6 indexed citations
3.
Kuo, Feng-Wei, Masoud Babaie, Lan-Chou Cho, et al.. (2018). An All-Digital PLL for Cellular Mobile Phones in 28-nm CMOS with −55 dBc Fractional and −91 dBc Reference Spurs. IEEE Transactions on Circuits and Systems I Regular Papers. 65(11). 3756–3768. 14 indexed citations
4.
Kuo, Feng-Wei, Lan-Chou Cho, Chewn-Pu Jou, et al.. (2017). A Bluetooth Low-Energy Transceiver With 3.7-mW All-Digital Transmitter, 2.75-mW High-IF Discrete-Time Receiver, and TX/RX Switchable On-Chip Matching Network. IEEE Journal of Solid-State Circuits. 52(4). 1144–1162. 101 indexed citations
5.
6.
Kuo, Feng-Wei, Teerachot Siriburanon, Chen Ron, et al.. (2017). A 0.5V 1.6mW 2.4GHz fractional-N all-digital PLL for Bluetooth LE with PVT-insensitive TDC using switched-capacitor doubler in 28nm CMOS. C178–C179. 12 indexed citations
8.
Babaie, Masoud, Feng-Wei Kuo, Lan-Chou Cho, et al.. (2016). A Fully Integrated Bluetooth Low-Energy Transmitter in 28 nm CMOS With 36% System Efficiency at 3 dBm. IEEE Journal of Solid-State Circuits. 51(7). 1547–1565. 78 indexed citations
9.
Kuo, Feng-Wei, Masoud Babaie, Chen Ron, et al.. (2015). A fully integrated 28nm Bluetooth Low-Energy transmitter with 36% system efficiency at 3dBm. Research Repository UCD (University College Dublin). 356–359. 9 indexed citations
10.
Zhan, Jing-Hong Conan, Yu-Li Hsueh, Min Chen, et al.. (2014). A 55nm CMOS 4-in-1 (11b/g/n, BT, FM, and GPS) radio-in-a-package with IPD front-end components directly connected to antenna. 209–212. 3 indexed citations
12.
13.
Cho, Lan-Chou, et al.. (2011). A 1.22/6.7 ppm/°C VCO with frequency-drifting compensator in 60 nm CMOS. 40. 101–104. 2 indexed citations
14.
Cho, Lan-Chou, et al.. (2011). A SAW-less GSM/GPRS/EDGE receiver embedded in a 65nm CMOS SoC. 364–366. 22 indexed citations
15.
Cho, Lan-Chou, et al.. (2011). A SAW-Less GSM/GPRS/EDGE Receiver Embedded in 65-nm SoC. IEEE Journal of Solid-State Circuits. 46(12). 3047–3060. 31 indexed citations
16.
Cho, Lan-Chou, et al.. (2009). A 33.6-to-33.8 Gb/s Burst-Mode CDR in 90 nm CMOS Technology. IEEE Journal of Solid-State Circuits. 44(3). 775–783. 7 indexed citations
17.
Lee, Chihun, et al.. (2008). A 50.8–53-GHz Clock Generator Using a Harmonic-Locked PD in 0.13-$\mu$m CMOS. IEEE Transactions on Circuits & Systems II Express Briefs. 55(5). 404–408. 4 indexed citations
18.
Cho, Lan-Chou, Chihun Lee, & Shen-Iuan Liu. (2007). A 1.2-V 37–38.5-GHz Eight-Phase Clock Generator in 0.13-$\mu$m CMOS Technology. IEEE Journal of Solid-State Circuits. 42(6). 1261–1270. 29 indexed citations
19.
Lee, Chihun, Lan-Chou Cho, & Shen-Iuan Liu. (2006). A 44GHz Dual-Modulus Divide-by-4/5 Prescaler in 90nm CMOS Technology. 397–400. 12 indexed citations
20.
Lee, Chihun, Lan-Chou Cho, & Shen-Iuan Liu. (2005). A 0.1-25.5-GHz Differential Cascaded-Distributed Amplifier in 0.18- μm CMOS Technology. 129–132. 10 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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