Kevin E. Murray
- Electrical and Electronic Engineering top 10%
- Hardware and Architecture top 2%
- Computer Networks and Communications top 10%
- Artificial Intelligence
- Computational Theory and Mathematics
- Topics
- VLSI and FPGA Design Techniques (16 papers)Embedded Systems Design Techniques (9 papers)Low-power high-performance VLSI design (8 papers)
- Cited by
- Hardware and ArchitectureElectrical and Electronic EngineeringComputer Networks and Communications
- Journals
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsIEEE Transactions on Very Large Scale Integration (VLSI) SystemsIEEE Micro
- Partner nations
- CanadaUnited StatesUnited Kingdom
In The Last Decade
Kevin E. Murray
17 papers receiving 501 citations
Peers
Comparison fields: 5 of 33
- Electrical and Electronic Engineering 448
- Hardware and Architecture 434
- Computer Networks and Communications 155
- Artificial Intelligence 33
- Computational Theory and Mathematics 16
Countries citing papers authored by Kevin E. Murray
This map shows the geographic impact of Kevin E. Murray's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Kevin E. Murray with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Kevin E. Murray more than expected).
Fields of papers citing papers by Kevin E. Murray
This network shows the impact of papers produced by Kevin E. Murray. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Kevin E. Murray. The network helps show where Kevin E. Murray may publish in the future.
Co-authorship network of co-authors of Kevin E. Murray
This figure shows the co-authorship network connecting the top 25 collaborators of Kevin E. Murray. A scholar is included among the top collaborators of Kevin E. Murray based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Kevin E. Murray. Kevin E. Murray is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 1 | |
| 2 | 1 | |
| 3 | 26 | |
| 4 | 28 | |
| 5 | 10 | |
| 6 | 17 | |
| 7 | 24 | |
| 8 | 185 | |
| 9 | 17 | |
| 10 | 4 | |
| 11 | 19 | |
| 12 | 1 | |
| 13 | 4 | |
| 14 | 77 | |
| 15 | 9 | |
| 16 | 89 | |
| 17 | 3 |
About Kevin E. Murray
Kevin E. Murray is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Computer Networks and Communications, having authored 17 papers that have together received 515 indexed citations. Recurring topics across this work include VLSI and FPGA Design Techniques (16 papers), Embedded Systems Design Techniques (9 papers) and Low-power high-performance VLSI design (8 papers). The work is most often cited by research in Hardware and Architecture (434 citations), Electrical and Electronic Engineering (448 citations) and Computer Networks and Communications (155 citations). Kevin E. Murray has collaborated with scholars based in Canada, United States and United Kingdom. Frequent co-authors include Vaughn Betz, Jason Luu, Suya Liu, Sheng Zhong, Kenneth B. Kent, Matthew Walker, Hanqing Zeng, Jean Wu, Jonathan Rose and Safeen Huda. Their work appears in journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems and IEEE Micro.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.