K. Tamaru
Impact in
- Hardware and Architecture top 5%
- VLSI and Analog Circuit Testing
-
- Low-power high-performance VLSI design
- VLSI and FPGA Design Techniques
- Electromagnetic Compatibility and Noise Suppression
- Advancements in Semiconductor Devices and Circuit Design
- Semiconductor materials and devices
- 3D IC and TSV technologies
Papers in
-
- Parallel Computing and Optimization Techniques 13
- Embedded Systems Design Techniques 10
- VLSI and Analog Circuit Testing 6
-
- Low-power high-performance VLSI design 15
- VLSI and FPGA Design Techniques 14
- Advancements in Semiconductor Devices and Circuit Design 11
- Advanced Memory and Neural Computing 5
- Co-authors
- T. SakuraiHidetoshi OnoderaVasily G. MoshnyagaMario TokoroMasaki KondoKazutoshi KobayashiMasaru TakeuchiYoshifumi Nishi
- Journals
- IEEE Journal of Solid-State Circuits (3 papers)Japanese Journal of Applied Physics (1 paper)IEICE Transactions on Electronics (1 paper)IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1 paper)Integrated ferroelectrics (1 paper)
- Partner nations
- Japan
In The Last Decade
K. Tamaru
41 papers receiving 610 citations
Hit Papers
Peers
Comparison fields: 5 of 41
- Hardware and Architecture 205
- Electrical and Electronic Engineering 563
- Nuclear Energy and Engineering 2
- Computer Networks and Communications 85
- Biomedical Engineering 119
Countries citing papers authored by K. Tamaru
This map shows the geographic impact of K. Tamaru's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by K. Tamaru with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites K. Tamaru more than expected).
Fields of papers citing papers by K. Tamaru
This network shows the impact of papers produced by K. Tamaru. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by K. Tamaru. The network helps show where K. Tamaru may publish in the future.
Co-authorship network
The 25 scholars most cited alongside K. Tamaru, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | 2003 | 1 | |
| 2 | 2003 | 3 | |
| 3 | 2003 | 0 | |
| 4 | 2002 | 1 | |
| 5 | 2002 | 1 | |
| 6 | 2002 | 4 | |
| 7 | 2002 | 1 | |
| 8 | 2002 | 9 | |
| 9 | 2002 | 1 | |
| 10 | 2002 | 0 | |
| 11 | 2002 | 1 | |
| 12 | 2002 | 0 | |
| 13 | 2002 | 1 | |
| 14 | An LSI for Low Bit-Rate Image Compression Using Vector Quantization | 1998 | 1 |
| 15 | 1997 | 1 | |
| 16 | A Memory-based Parallel Processor for Vector Quantization | 1996 | 12 |
| 17 | 1993 | 1 | |
| 18 | 1990 | 73 | |
| 19 | 1975 | 2 | |
| 20 | 1972 | 2 |
About K. Tamaru
K. Tamaru is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering, Signal Processing, Computer Vision and Pattern Recognition and Computer Networks and Communications, having authored 50 papers that have together received 663 indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (15 papers), VLSI and FPGA Design Techniques (14 papers), Parallel Computing and Optimization Techniques (13 papers), Advancements in Semiconductor Devices and Circuit Design (11 papers), Embedded Systems Design Techniques (10 papers), Advanced Data Compression Techniques (7 papers), VLSI and Analog Circuit Testing (6 papers) and Advanced Memory and Neural Computing (5 papers). The work is most often cited by research in Hardware and Architecture (205 citations), Electrical and Electronic Engineering (563 citations), Nuclear Energy and Engineering (2 citations), Computer Networks and Communications (85 citations) and Biomedical Engineering (119 citations). K. Tamaru has collaborated with scholars based in Japan. Frequent co-authors include T. Sakurai, Hidetoshi Onodera, Vasily G. Moshnyaga, Mario Tokoro, Masaki Kondo, Kazutoshi Kobayashi, Masaru Takeuchi, Yoshifumi Nishi, Takuya Kitamura and Yuki Mori. Their work appears in journals such as IEEE Journal of Solid-State Circuits, Japanese Journal of Applied Physics, IEICE Transactions on Electronics, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and Integrated ferroelectrics.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.