Hiroto Yasuura

3.2k total citations · 1 hit paper
164 papers, 2.1k citations indexed

About

Hiroto Yasuura is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, Hiroto Yasuura has authored 164 papers receiving a total of 2.1k indexed citations (citations by other indexed papers that have themselves been cited), including 81 papers in Electrical and Electronic Engineering, 72 papers in Hardware and Architecture and 42 papers in Computer Networks and Communications. Recurrent topics in Hiroto Yasuura's work include Embedded Systems Design Techniques (48 papers), Low-power high-performance VLSI design (48 papers) and Parallel Computing and Optimization Techniques (39 papers). Hiroto Yasuura is often cited by papers focused on Embedded Systems Design Techniques (48 papers), Low-power high-performance VLSI design (48 papers) and Parallel Computing and Optimization Techniques (39 papers). Hiroto Yasuura collaborates with scholars based in Japan, United States and Taiwan. Hiroto Yasuura's co-authors include Tohru Ishihara, Naofumi Takagi, Hiroyuki Tomiyama, Yun Cao, Sozo Inoue, Ralph H. J. M. Otten, Akihiko Inoue, Nagisa Ishiura, Shuzo Yajima and Toshinori Sato and has published in prestigious journals such as IEEE Transactions on Computers, Future Generation Computer Systems and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

In The Last Decade

Hiroto Yasuura

147 papers receiving 2.0k citations

Hit Papers

Voltage scheduling problem for dynamically variable volta... 1998 2026 2007 2016 1998 100 200 300 400 500

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Hiroto Yasuura Japan 22 1.2k 1.1k 703 288 204 164 2.1k
Jonathan Bachrach United States 19 946 0.8× 680 0.6× 831 1.2× 150 0.5× 482 2.4× 54 2.1k
Adriano Valenzano Italy 24 706 0.6× 578 0.5× 1.5k 2.2× 317 1.1× 268 1.3× 188 2.2k
Pedro Reviriego Spain 26 1.3k 1.0× 2.3k 2.1× 1.3k 1.9× 84 0.3× 485 2.4× 331 3.2k
S. Dey United States 29 2.4k 1.9× 2.3k 2.0× 1.5k 2.1× 86 0.3× 132 0.6× 141 3.5k
Semeen Rehman Germany 23 735 0.6× 1.2k 1.1× 411 0.6× 101 0.4× 242 1.2× 78 1.6k
Qing Yang United States 19 594 0.5× 305 0.3× 1.5k 2.1× 70 0.2× 229 1.1× 108 1.9k
Marc Geilen Netherlands 26 2.1k 1.7× 303 0.3× 1.6k 2.3× 490 1.7× 212 1.0× 178 2.8k
C. Siva Ram Murthy India 29 438 0.4× 2.4k 2.1× 3.6k 5.1× 100 0.3× 189 0.9× 283 4.6k
Alireza Ejlali Iran 29 1.2k 1.0× 1.3k 1.1× 966 1.4× 77 0.3× 132 0.6× 137 2.2k
Franco Fummi Italy 20 1.5k 1.2× 737 0.7× 525 0.7× 463 1.6× 143 0.7× 318 2.2k

Countries citing papers authored by Hiroto Yasuura

Since Specialization
Citations

This map shows the geographic impact of Hiroto Yasuura's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Hiroto Yasuura with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Hiroto Yasuura more than expected).

Fields of papers citing papers by Hiroto Yasuura

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Hiroto Yasuura. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Hiroto Yasuura. The network helps show where Hiroto Yasuura may publish in the future.

Co-authorship network of co-authors of Hiroto Yasuura

This figure shows the co-authorship network connecting the top 25 collaborators of Hiroto Yasuura. A scholar is included among the top collaborators of Hiroto Yasuura based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Hiroto Yasuura. Hiroto Yasuura is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Muroyama, Masanori, et al.. (2003). Variable Pipeline Depth Processor for Energy Efficient Systems. Medical Entomology and Zoology. 103(12). 19–24. 1 indexed citations
2.
Yasuura, Hiroto, et al.. (2002). Optimization of Test Accesses with a Combined BIST and External Test Scheme. Asia and South Pacific Design Automation Conference. 683–688. 1 indexed citations
3.
Cao, Yun, et al.. (2002). Low-Energy Design Using Datapath Width Optimization for Embedded Processor-Based Systems. Kyushu University Institutional Repository (QIR) (Kyushu University). 43(5). 1348–1356. 2 indexed citations
4.
Yamashita, Hajime, et al.. (2000). Development of an Embedded System LSI for MPEG-2 AAC Decoder: a Case Study. Kyushu University Institutional Repository (QIR) (Kyushu University). 99(614). 1–7. 1 indexed citations
5.
Yasuura, Hiroto & Tohru Ishihara. (2000). System LSI design methods for low power LSIs. IEICE Transactions on Electronics. 83(2). 143–152. 1 indexed citations
6.
Tomiyama, Hiroyuki & Hiroto Yasuura. (1998). Module selection using manufacturing information. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. 2576–2584. 1 indexed citations
7.
Inoue, Akihiko, et al.. (1998). Soft-Core Processor Architecture for Embedded System Design. IEICE Transactions on Electronics. 81(9). 1416–1423. 15 indexed citations
8.
Tomiyama, Hiroyuki, Tohru Ishihara, Akihiko Inoue, & Hiroto Yasuura. (1998). Instruction scheduling for power reduction in processor-based system design. Design, Automation, and Test in Europe. 855–860. 26 indexed citations
9.
Ishihara, Tohru & Hiroto Yasuura. (1998). Programmable power management architecture for power reduction. IEICE Transactions on Electronics. 81(9). 1473–1479. 3 indexed citations
10.
Otten, Ralph H. J. M. & Hiroto Yasuura. (1997). Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design. 61(5). 735–42. 47 indexed citations
11.
Kawasaki, Takashi, et al.. (1997). Development of A Standard Cell Library for VDEC. 97(141). 105–111. 2 indexed citations
12.
Koizumi, Hisao, et al.. (1996). Satsuki: An Integrated Processor Synthesis and Compiler Generation System (Special Issue on Synthesis and Verification of Hardware Design). IEICE Transactions on Information and Systems. 79(10). 1373–1381. 2 indexed citations
13.
Tomiyama, Hiroyuki & Hiroto Yasuura. (1996). Optimal code placement of embedded software for instruction caches. 96–101. 27 indexed citations
14.
Koizumi, Hisao, et al.. (1996). Satsuki: An integrated processor synthesis and compiler generation system. IEICE Transactions on Information and Systems. 1373–1381. 9 indexed citations
15.
Tomiyama, Hiroyuki & Hiroto Yasuura. (1996). Size-constrained code placement for cache miss rate reduction. 96–101. 9 indexed citations
16.
Koizumi, Hisao, et al.. (1995). A Proposal for a Co-design Method in Control Systems Using Combination of Models. IEICE Transactions on Information and Systems. 78(3). 237–247. 6 indexed citations
17.
Dutt, Nikil, et al.. (1994). Design Reuse: Fact or Fiction? (Panel).. Design Automation Conference. 562. 1 indexed citations
18.
Yasuura, Hiroto. (1984). On Parallel Computational Complexity of Unification.. Future Generation Computer Systems. 15(4). 235–243. 20 indexed citations
19.
Merrett, T. H., Yahiko Kambayashi, & Hiroto Yasuura. (1981). Scheduling of page-fetches in join operations. Very Large Data Bases. 488–498. 37 indexed citations
20.
Yasuura, Hiroto & Shuzo Yajima. (1979). ON THE DEPTH OF COMBINATIONAL CIRCUITS REQUIRED TO COMPUTE SWITCHING FUNCTIONS.. 10(5). 1–10. 2 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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