Jose Renau

2.1k total citations
78 papers, 1.5k citations indexed

About

Jose Renau is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Computer Networks and Communications. According to data from OpenAlex, Jose Renau has authored 78 papers receiving a total of 1.5k indexed citations (citations by other indexed papers that have themselves been cited), including 68 papers in Hardware and Architecture, 47 papers in Electrical and Electronic Engineering and 29 papers in Computer Networks and Communications. Recurrent topics in Jose Renau's work include Parallel Computing and Optimization Techniques (63 papers), Low-power high-performance VLSI design (36 papers) and Embedded Systems Design Techniques (23 papers). Jose Renau is often cited by papers focused on Parallel Computing and Optimization Techniques (63 papers), Low-power high-performance VLSI design (36 papers) and Embedded Systems Design Techniques (23 papers). Jose Renau collaborates with scholars based in United States, Spain and France. Jose Renau's co-authors include Josep Torrellas, Michael Huang, Ehsan K. Ardestani, Francisco J. Mesa-Martínez, Seung-Moon Yoo, Luís Ceze, James Tuck, Karin Strauß, Wei Liu and Wonsun Ahn and has published in prestigious journals such as SHILAP Revista de lepidopterología, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and ACM SIGPLAN Notices.

In The Last Decade

Jose Renau

77 papers receiving 1.5k citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
Jose Renau United States	20	1.3k	881	700	193	79	78	1.5k
Pejman Lotfi-Kamran Iran	17	821 0.6×	850 1.0×	495 0.7×	183 0.9×	106 1.3×	48	1.2k
Donald Yeung United States	21	1.4k 1.1×	1.3k 1.4×	392 0.6×	254 1.3×	115 1.5×	72	1.6k
Joseph L. Greathouse United States	15	808 0.6×	680 0.8×	351 0.5×	187 1.0×	142 1.8×	34	1.0k
Trevor E. Carlson Singapore	16	1.2k 1.0×	1.0k 1.1×	546 0.8×	199 1.0×	150 1.9×	75	1.5k
Karam S. Chatha United States	24	1.4k 1.1×	1.3k 1.5×	841 1.2×	72 0.4×	27 0.3×	75	1.7k
Stijn Eyerman Belgium	25	2.0k 1.6×	1.8k 2.0×	659 0.9×	596 3.1×	104 1.3×	76	2.3k
Balaram Sinharoy United States	12	1.3k 1.0×	1.1k 1.3×	520 0.7×	143 0.7×	71 0.9×	28	1.5k
Edmund B. Nightingale United States	20	1.3k 1.0×	2.3k 2.6×	668 1.0×	622 3.2×	185 2.3×	28	2.5k
Wim Heirman Belgium	15	1.2k 0.9×	958 1.1×	541 0.8×	175 0.9×	103 1.3×	66	1.4k
Eugene Gorbatov United States	9	1.0k 0.8×	1.0k 1.2×	421 0.6×	617 3.2×	85 1.1×	12	1.4k

Countries citing papers authored by Jose Renau

Since Specialization

Citations

This map shows the geographic impact of Jose Renau's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Jose Renau with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Jose Renau more than expected).

Fields of papers citing papers by Jose Renau

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Jose Renau. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Jose Renau. The network helps show where Jose Renau may publish in the future.

Co-authorship network of co-authors of Jose Renau

This figure shows the co-authorship network connecting the top 25 collaborators of Jose Renau. A scholar is included among the top collaborators of Jose Renau based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Jose Renau. Jose Renau is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

Sort: Min cites: Since: Top N: Style:

20 of 20 papers shown

Renau, Jose, et al.. (2024). HDLEval Benchmarking LLMs for multiple HDLs. 1–5. 3 indexed citations

Renau, Jose. (2018). Securing Processors from Time Side Channels. eScholarship (California Digital Library). 1 indexed citations

Ardestani, Ehsan K., et al.. (2018). GPU NTC Process Variation Compensation With Voltage Stacking. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 26(9). 1713–1726. 12 indexed citations

Renau, Jose, et al.. (2015). Section based program analysis to reduce overhead of detecting unsynchronized thread communication. ACM SIGPLAN Notices. 50(8). 283–284. 2 indexed citations

Ziabari, Amirkoushyar, et al.. (2014). Power Blurring: Fast Static and Transient Thermal Analysis Method for Packaged Integrated Circuits and Power Devices. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 22(11). 2366–2379. 55 indexed citations

Ardestani, Ehsan K., et al.. (2013). An energy efficient GPGPU memory hierarchy with tiny incoherent caches. 9–14. 5 indexed citations

Ardestani, Ehsan K. & Jose Renau. (2013). ESESC: A fast multicore simulator using Time-Based Sampling. 448–459. 94 indexed citations

Ardestani, Ehsan K., et al.. (2010). Cooling solutions for processor Infrared Thermography. 187–190. 10 indexed citations

Mesa-Martínez, Francisco J., et al.. (2008). Measuring power and temperature from real processors. Proceedings - IEEE International Parallel and Distributed Processing Symposium. 1–5. 17 indexed citations

10.

Mesa-Martínez, Francisco J. & Jose Renau. (2007). Effective Optimistic-Checker Tandem Core Design through Architectural Pruning. 236–248. 38 indexed citations

11.

Renau, Jose, James Tuck, Wei Liu, et al.. (2005). Tasking with out-of-order spawn in TLS chip multiprocessors. 179–188. 62 indexed citations

12.

Renau, Jose, Karin Strauß, Luís Ceze, et al.. (2005). Thread-Level Speculation on a CMP can be energy efficient. 219–228. 25 indexed citations

13.

Mesa-Martínez, Francisco J., et al.. (2005). /spl mu/Complexity: estimating processor design effort. 10 pp.–218. 14 indexed citations

14.

Huang, Michael, Jose Renau, & Josep Torrellas. (2003). Positional adaptation of processors. ACM SIGARCH Computer Architecture News. 31(2). 157–168. 5 indexed citations

15.

Martínez, José F., Jose Renau, Michael Huang, & Milos Prvulović. (2003). Cherry: Checkpointed early resource recycling in out-of-order microprocessors. 3–14. 84 indexed citations

16.

Huang, Minsheng, Jose Renau, & Josep Torrellas. (2002). Energy-efficient hybrid wakeup logic. 196–201. 6 indexed citations

17.

Huang, Michael, Jose Renau, Seung-Moon Yoo, & Josep Torrellas. (2002). A framework for dynamic energy efficiency and temperature management. 202–213. 28 indexed citations

18.

Huang, Michael, Jose Renau, Seung-Moon Yoo, & Josep Torrellas. (2001). The design of DEETM: A framework for dynamic energy efficiency and temperature management. 3. 12 indexed citations

19.

Huang, Michael, et al.. (2001). Energy/performance design of memory hierarchies for processor-in-memory chips. Lecture notes in computer science. 152–159. 2 indexed citations

20.

Renau, Jose. (2000). Memory Hierarchies In Intelligent Memories: Energy/Performance Design. 2 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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