J.L. Neves

1.3k total citations
29 papers, 804 citations indexed

About

J.L. Neves is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Biomedical Engineering. According to data from OpenAlex, J.L. Neves has authored 29 papers receiving a total of 804 indexed citations (citations by other indexed papers that have themselves been cited), including 28 papers in Electrical and Electronic Engineering, 10 papers in Hardware and Architecture and 3 papers in Biomedical Engineering. Recurrent topics in J.L. Neves's work include Low-power high-performance VLSI design (25 papers), VLSI and FPGA Design Techniques (9 papers) and Semiconductor materials and devices (9 papers). J.L. Neves is often cited by papers focused on Low-power high-performance VLSI design (25 papers), VLSI and FPGA Design Techniques (9 papers) and Semiconductor materials and devices (9 papers). J.L. Neves collaborates with scholars based in United States. J.L. Neves's co-authors include Eby G. Friedman, Yehea Ismail, Charles J. Alpert, Stephen T. Quay, Jiang Hu, Sachin S. Sapatnekar and A. Albicki and has published in prestigious journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems and VLSI design.

In The Last Decade

J.L. Neves

28 papers receiving 732 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
J.L. Neves United States 13 672 252 76 71 29 29 804
Kevin Donnelly United States 11 684 1.0× 109 0.4× 60 0.8× 278 3.9× 2 0.1× 34 843
Robin Wilson France 12 227 0.3× 97 0.4× 30 0.4× 36 0.5× 2 0.1× 40 377
Kaushik Gala United States 10 460 0.7× 229 0.9× 21 0.3× 20 0.3× 2 0.1× 19 501
Daniel Webber United States 9 351 0.5× 158 0.6× 65 0.9× 28 0.4× 23 451
B.A. Randall United States 11 430 0.6× 107 0.4× 7 0.1× 6 0.1× 20 476
Joe Ross United States 5 195 0.3× 103 0.4× 53 0.7× 4 0.1× 9 277
Christoph Ludwig Germany 9 85 0.1× 9 0.0× 27 0.4× 5 0.1× 18 0.6× 26 254
Paul Griffin Singapore 12 196 0.3× 5 0.0× 8 0.1× 61 0.9× 13 0.4× 28 386

Countries citing papers authored by J.L. Neves

Since Specialization
Citations

This map shows the geographic impact of J.L. Neves's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by J.L. Neves with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites J.L. Neves more than expected).

Fields of papers citing papers by J.L. Neves

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by J.L. Neves. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by J.L. Neves. The network helps show where J.L. Neves may publish in the future.

Co-authorship network of co-authors of J.L. Neves

This figure shows the co-authorship network connecting the top 25 collaborators of J.L. Neves. A scholar is included among the top collaborators of J.L. Neves based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with J.L. Neves. J.L. Neves is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Ismail, Yehea, Eby G. Friedman, & J.L. Neves. (2003). Equivalent Elmore delay for RLC trees. 715–720. 15 indexed citations
2.
Ismail, Yehea, Eby G. Friedman, & J.L. Neves. (2003). Repeater insertion in tree structured inductive interconnect. 420–424. 2 indexed citations
3.
Ismail, Yehea, Eby G. Friedman, & J.L. Neves. (2003). Optimizing RLC tree delays by employing repeater insertion. 14–18. 1 indexed citations
4.
Ismail, Yehea, Eby G. Friedman, & J.L. Neves. (2003). Inductance effects in RLC trees. 56–59. 1 indexed citations
5.
Ismail, Yehea, Eby G. Friedman, & J.L. Neves. (2002). Performance criteria for evaluating the importance of on-chip inductance. 2. 244–247. 9 indexed citations
6.
Alpert, Charles J., et al.. (2002). Buffer library selection. 221–226. 17 indexed citations
7.
Ismail, Yehea, Eby G. Friedman, & J.L. Neves. (2002). Transient power in CMOS gates driving LC transmission lines. 1. 337–340. 2 indexed citations
8.
Neves, J.L. & Eby G. Friedman. (2002). Synthesizing distributed buffer clock trees for high performance ASICs. 126–129. 2 indexed citations
9.
Neves, J.L. & Eby G. Friedman. (2002). Circuit synthesis of clock distribution networks based on non-zero clock skew. 4. 175–178. 5 indexed citations
10.
Ismail, Yehea, Eby G. Friedman, & J.L. Neves. (2002). INDUCTANCE EFFECTS IN RLC TREES. Journal of Circuits Systems and Computers. 11(3). 305–321. 1 indexed citations
11.
Ismail, Yehea, Eby G. Friedman, & J.L. Neves. (2000). Equivalent Elmore delay for RLC trees. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 19(1). 83–97. 148 indexed citations
12.
Ismail, Yehea, Eby G. Friedman, & J.L. Neves. (1999). Repeater insertion in tree structured inductive interconnect. International Conference on Computer Aided Design. 420–424. 7 indexed citations
13.
Ismail, Yehea, Eby G. Friedman, & J.L. Neves. (1999). Dynamic and short-circuit power of CMOS gates driving lossless transmission lines. IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications. 46(8). 950–961. 25 indexed citations
14.
Ismail, Yehea, Eby G. Friedman, & J.L. Neves. (1999). Equivalent Elmore delay for RLC trees. 42. 715–720. 23 indexed citations
15.
Ismail, Yehea, Eby G. Friedman, & J.L. Neves. (1999). Figures of merit to characterize the importance of on-chip inductance. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 7(4). 442–449. 158 indexed citations
16.
Neves, J.L. & Eby G. Friedman. (1998). Automated Synthesis of Skew‐Based Clock Distribution Networks. VLSI design. 7(1). 31–57. 3 indexed citations
17.
Ismail, Yehea, Eby G. Friedman, & J.L. Neves. (1998). Figures of merit to characterize the importance of on-chip inductance. 560–565. 79 indexed citations
18.
Ismail, Yehea, Eby G. Friedman, & J.L. Neves. (1998). Power dissipated by CMOS gates driving lossless transmission lines. 139–142. 1 indexed citations
19.
Neves, J.L. & Eby G. Friedman. (1996). Optimal clock skew scheduling tolerant to process variations. 623–628. 68 indexed citations
20.
Neves, J.L.. (1996). PESQUISA QUALITATIVA - CARACTERÍSTICAS, USOS E POSSIBILIDADES. 100 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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