Jinan Lou

528 total citations
20 papers, 401 citations indexed

About

Jinan Lou is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, Jinan Lou has authored 20 papers receiving a total of 401 indexed citations (citations by other indexed papers that have themselves been cited), including 18 papers in Electrical and Electronic Engineering, 14 papers in Hardware and Architecture and 7 papers in Computer Networks and Communications. Recurrent topics in Jinan Lou's work include VLSI and FPGA Design Techniques (17 papers), VLSI and Analog Circuit Testing (12 papers) and Low-power high-performance VLSI design (10 papers). Jinan Lou is often cited by papers focused on VLSI and FPGA Design Techniques (17 papers), VLSI and Analog Circuit Testing (12 papers) and Low-power high-performance VLSI design (10 papers). Jinan Lou collaborates with scholars based in United States, Switzerland and China. Jinan Lou's co-authors include Massoud Pedram, Wei Chen, Wei Chen, Ruying Wang, Qiao‐Li Dong, Zhen Li, Qing He, Haoran Zheng, Shuai Shao and Weiwei Li and has published in prestigious journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Chemical Engineering and Processing - Process Intensification and Results in Engineering.

In The Last Decade

Jinan Lou

19 papers receiving 376 citations

Peers

Jinan Lou
M.A.B. Jackson United States
Maogang Wang United States
Tianming Kong United States
K. Chaudhary United States
Bo-Kyung Choi United States
Michail Romesis United States
S.K. Goel Netherlands
D.K. Bhavsar United States
Clemens Wouters Netherlands
M.A.B. Jackson United States
Jinan Lou
Citations per year, relative to Jinan Lou Jinan Lou (= 1×) peers M.A.B. Jackson

Countries citing papers authored by Jinan Lou

Since Specialization
Citations

This map shows the geographic impact of Jinan Lou's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Jinan Lou with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Jinan Lou more than expected).

Fields of papers citing papers by Jinan Lou

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Jinan Lou. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Jinan Lou. The network helps show where Jinan Lou may publish in the future.

Co-authorship network of co-authors of Jinan Lou

This figure shows the co-authorship network connecting the top 25 collaborators of Jinan Lou. A scholar is included among the top collaborators of Jinan Lou based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Jinan Lou. Jinan Lou is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Li, Zhen, et al.. (2025). Multi-objective optimization of wavy microchannel heat sinks with symmetric configurations generated by interpolation curves. Results in Engineering. 26. 105500–105500. 1 indexed citations
2.
Li, Zhen, et al.. (2025). An open-source framework for the multi-objective optimization of passive micromixer based on RSM and MOEA/D. Chemical Engineering and Processing - Process Intensification. 213. 110316–110316.
3.
Lou, Jinan, et al.. (2011). Post sign-off leakage power optimization. 453–458. 3 indexed citations
4.
Lou, Jinan & Wei Chen. (2004). Crosstalk-aware placement. IEEE Design & Test of Computers. 21(1). 24–32. 16 indexed citations
6.
Lou, Jinan & Wei Chen. (2003). Cross talk driven placement. 735–735. 7 indexed citations
7.
Lou, Jinan, et al.. (2003). Concurrent logic restructuring and placement for timing closure. 31–35. 1 indexed citations
8.
Lou, Jinan, et al.. (2002). Estimating routing congestion using probabilistic analysis. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 21(1). 32–41. 105 indexed citations
9.
Lou, Jinan, et al.. (2002). Hierarchical buffered routing tree generation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 21(5). 554–567. 2 indexed citations
10.
Lou, Jinan, et al.. (2002). A DSM design flow: putting floorplanning, technology-mapping, and gate-placement together. 128–133. 12 indexed citations
11.
Lou, Jinan, et al.. (2002). An integrated flow for technology remapping and placement of sub-half-micron circuits. 295–300. 2 indexed citations
12.
Lou, Jinan, et al.. (2001). Estimating routing congestion using probabilistic analysis. 112–117. 112 indexed citations
13.
Lou, Jinan, Wei Chen, & Massoud Pedram. (1999). Concurrent logic restructuring and placement for timing closure. International Conference on Computer Aided Design. 31–36. 20 indexed citations
14.
Lou, Jinan, et al.. (1999). MERLIN. 472–478. 8 indexed citations
15.
Lou, Jinan, et al.. (1999). An integrated logical and physical design flow for deep submicron circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 18(9). 1305–1315. 17 indexed citations
16.
Lou, Jinan, et al.. (1998). A DSM design flow. 128–134. 18 indexed citations
17.
Lou, Jinan, et al.. (1998). A simultaneous routing tree construction and fanout optimization algorithm. 625–630. 23 indexed citations
18.
Lou, Jinan, et al.. (1997). An exact solution to simultaneous technology mapping and linear placement problem. International Conference on Computer Aided Design. 671–675. 34 indexed citations
19.
Lou, Jinan, et al.. (1997). An exact solution to simultaneous technology mapping and linear placement problem. 671–675. 17 indexed citations
20.
Lou, Jinan, et al.. (1964). Systematic design of cryogenic logic circuits. 651–651. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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