Ivan S. Kourtev

710 total citations
36 papers, 521 citations indexed

About

Ivan S. Kourtev is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, Ivan S. Kourtev has authored 36 papers receiving a total of 521 indexed citations (citations by other indexed papers that have themselves been cited), including 31 papers in Electrical and Electronic Engineering, 24 papers in Hardware and Architecture and 6 papers in Computer Networks and Communications. Recurrent topics in Ivan S. Kourtev's work include Low-power high-performance VLSI design (29 papers), VLSI and FPGA Design Techniques (17 papers) and Embedded Systems Design Techniques (12 papers). Ivan S. Kourtev is often cited by papers focused on Low-power high-performance VLSI design (29 papers), VLSI and FPGA Design Techniques (17 papers) and Embedded Systems Design Techniques (12 papers). Ivan S. Kourtev collaborates with scholars based in United States, Israel and France. Ivan S. Kourtev's co-authors include Eby G. Friedman, Barış Taşkın, Eby G. Friedman, John Wood, Alex K. Jones, J. Lucas, Dara Kusic, V. Adler, Ami Litman and Dimitrios Velenis and has published in prestigious journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems and Journal of Circuits Systems and Computers.

In The Last Decade

Ivan S. Kourtev

33 papers receiving 484 citations

Peers

Countries citing papers authored by Ivan S. Kourtev

Since Specialization

Citations

This map shows the geographic impact of Ivan S. Kourtev's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Ivan S. Kourtev with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Ivan S. Kourtev more than expected).

Fields of papers citing papers by Ivan S. Kourtev

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Ivan S. Kourtev. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Ivan S. Kourtev. The network helps show where Ivan S. Kourtev may publish in the future.

Co-authorship network of co-authors of Ivan S. Kourtev

This figure shows the co-authorship network connecting the top 25 collaborators of Ivan S. Kourtev. A scholar is included among the top collaborators of Ivan S. Kourtev based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Ivan S. Kourtev. Ivan S. Kourtev is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	MULTI-PHASE ROTARY CLOCK SYNCHRONIZATION OF LEVEL-SENSITIVE CIRCUITS 2009 ·Journal of Circuits Systems and Computers ·Barış Taşkın, Ivan S. Kourtev	2
2	Delay insertion method in clock skew scheduling 2006 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Barış Taşkın, Ivan S. Kourtev	22
3	A 64-way VLIW/SIMD FPGA architecture and design flow 2005 ·Alex K. Jones, (unknown), Ivan S. Kourtev, (unknown), Dara Kusic, John M. Foster, Stephanie C. Boddie, (unknown)	7
4	LURU: global-scope fpga technology mapping with content-addressable memories 2005 ·J. Lucas, (unknown), Ivan S. Kourtev, Alex K. Jones	4
5	Linearization of the timing analysis and optimization of level-sensitive digital synchronous circuits 2004 ·IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Barış Taşkın, Ivan S. Kourtev	9
6	The sandbox design experience course 2004 ·Herman Schmit, Ivan S. Kourtev, N. Vijaykrishnan, (unknown)	1
7	Substrate coupling in digital circuits in mixed-signal smart-power systems 2004 ·IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·(unknown), (unknown), (unknown), (unknown), (unknown), (unknown), (unknown), (unknown), (unknown), Ivan S. Kourtev, Eby G. Friedman	9
8	Short Courses in System-on-a-Chip (SoC) design 2004 ·Ivan S. Kourtev, (unknown), Steven P. Levitan, (unknown), Bruce R. Childers, Donald M. Chiarulli, (unknown)	0
9	Time borrowing and clock skew scheduling effects on multi-phase level-sensitive circuits 2004 ·Barış Taşkın, Ivan S. Kourtev	3
10	Reduced dynamic swing domino logic 2003 ·(unknown), Ivan S. Kourtev	1
11	Clock skew scheduling for improved reliability via quadratic programming 2003 ·Ivan S. Kourtev, Eby G. Friedman	23
12	Reduced dynamic swing domino logic 2003 ·(unknown), Ivan S. Kourtev	9
13	A quadratic programming approach to clock skew scheduling for reduced sensitivity to process parameter variations 2003 ·Ivan S. Kourtev, Eby G. Friedman	9
14	The behavior of digital circuits under substrate noise in a mixed-signal smart-power environment 2003 ·(unknown), Ivan S. Kourtev, (unknown), (unknown), (unknown), (unknown), (unknown), Eby G. Friedman	3
15	Large scale clock skew scheduling techniques for improved reliability of digital synchronous VLSI circuits 2003 ·(unknown), Eby G. Friedman, Ami Litman, Ivan S. Kourtev	4
16	Linear timing analysis of SOC synchronous circuits with level-sensitive latches 2003 ·Barış Taşkın, Ivan S. Kourtev	6
17	Performance optimization of single-phase level-sensitive circuits using time borrowing and non-zero clock skew 2002 ·Barış Taşkın, Ivan S. Kourtev	6
18	A single latch, high speed double-edge triggered flip-flop (DETFF) 2002 ·(unknown), Ivan S. Kourtev	20
19	Clock skew scheduling for improved reliability via quadratic programming 1999 ·International Conference on Computer Aided Design ·Ivan S. Kourtev, Eby G. Friedman	39
20	Synthesis of clock tree topologies to implement nonzero clock skew schedule 1999 ·IEE Proceedings - Circuits Devices and Systems ·Ivan S. Kourtev, Eby G. Friedman	5

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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