H. Meyr

11.7k citations

292 papers · 7.5k indexed · 3 hit papers · h-index 40

Impact in

Hardware and Architecture top 0.2%
- Embedded Systems Design Techniques
- Parallel Computing and Optimization Techniques
Computer Networks and Communications top 0.2%
- Wireless Communication Networks Research
- Interconnection Networks and Systems
- Error Correcting Code Techniques

Papers in

Hardware and Architecture 128
- Embedded Systems Design Techniques 117
- Parallel Computing and Optimization Techniques 96
- Real-Time Systems Scheduling 22
Computer Networks and Communications 174
- Wireless Communication Networks Research 71
- Interconnection Networks and Systems 56
- Error Correcting Code Techniques 40

Co-authors: Stefan A. Fechtel M. Speth G. Fock M. Oerder Gerd Ascheid Marc Moeneclaey Rainer Leupers Gerhard Fettweis
Journals: IEEE Transactions on Communications (19 papers)IEEE Journal on Selected Areas in Communications (5 papers)IEEE Communications Magazine (3 papers)IEEE Transactions on Information Theory (3 papers)IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2 papers)
Partner nations: Germany United States Switzerland

In The Last Decade

H. Meyr

277 papers receiving 6.9k citations

Hit Papers

align trajectories log scale

Digital Communication Receivers: Synchronization, Channel Estimation, and Signal Processing 2001 · 718 citations

What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if any of the following hold:

it has ≥500 total citations;
it reaches ≥1.5× the top-1% citation threshold for papers in the same subfield and year (the threshold is the minimum needed to enter the top 1%, not the average within it);
it reaches the top citation threshold in at least one of its specific research topics.

2001 CERN Document Server (European Organization for Nuclear Research)
1999 IEEE Transactions on Communications
1988 IEEE Transactions on Communications

Peers

Countries citing papers authored by H. Meyr

Since Specialization

Citations

This map shows the geographic impact of H. Meyr's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by H. Meyr with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites H. Meyr more than expected).

Fields of papers citing papers by H. Meyr

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by H. Meyr. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by H. Meyr. The network helps show where H. Meyr may publish in the future.

Co-authorship network

The 25 scholars most cited alongside H. Meyr, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with H. Meyr Line = papers co-authored together H. Meyr links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

#	Work
1	On the Performance Gap between ML and Iterative Decoding of Finite-Length Turbo-Coded BICM in MIMO Systems IEEE Transactions on Communications ·Dan Zhang, H. Meyr	2017	3
2	Trace-based KPN composability analysis for mapping simultaneous applications to MPSoC platforms Design, Automation, and Test in Europe ·Jerónimo Castrillón, Thomas K. Andersson, Tasuku Kamada, Weihua Sheng, 秀子竹内, Rainer Leupers, Gerd Ascheid, H. Meyr	2010	21
3	Low-Complexity Channel-Adaptive MIMO Detection with Just-Acceptable Error Rate I‐Wei Lai, Gerd Ascheid, H. Meyr, Tzi‐Dar Chiueh	2009	4
4	Design space exploration of partially re-configurable embedded processors Design, Automation, and Test in Europe ·Anupam Chattopadhyay, Kenny Boyd, Ümmühan Elçin ERTUĞRUL, David W. Kammler, Rainer Leupers, Gerd Ascheid, H. Meyr	2007	9
5	Interactive presentation: SoftSIMD - exploiting subword parallelism using source code transformations Design, Automation, and Test in Europe ·이병두, Rainer Leupers, Gerd Ascheid, H. Meyr	2007	1
6	Products of Random Matrices in Iterative (Turbo) Decoding L. Schmitt, H. Meyr	2006	1
7	Turbo Decoding as an Approximative Iterative Solution to Maximum Likelihood Sequence Detection L. Schmitt, H. Meyr	2006	2
8	FFT processor: a case study in ASIP development PORTO Publications Open Repository TOrino (Politecnico di Torino) ·Mario Nicola, Guido Masera, Maurizio Zamboni, L. L. Poltavtseva, David W. Kammler, Gerd Ascheid, H. Meyr	2005	9
9	Processor/Memory Co-Exploration on Multiple Abstraction Levels Design, Automation, and Test in Europe ·Gunnar Braun, Andreas Wieferink, Oliver Schliebusch, Rainer Leupers, H. Meyr, Achim Nohl	2003	14
10	A modular simulation framework for architectural exploration of on-chip interconnection networks Tim Kogel, Tok-Wang Ling, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, H. Meyr, La Ode Arkham	2003	9
11	Instruction encoding synthesis for architecture exploration using hierarchical processor models Achim Nohl, Kwang-ki Kim, Gunnar Braun, 卞向飞, Rainer Leupers, Oliver Schliebusch, H. Meyr	2003	8
12	Performance bounds for a UMTS RAKE receiver with imperfect timing synchronisation J. Baltersee, G. Fock, 泰和, H. Meyr	2003	1
13	Architecture Implementation Using the Machine Description Language LISA Asia and South Pacific Design Automation Conference ·Oliver Schliebusch, Andreas Hoffmann, Achim Nohl, Gunnar Braun, H. Meyr	2002	37
14	Multiprocessor scheduling with a priori node assignment V. Zivojnovic, Wu Xiufu, H. Meyr	2002	3
15	A survey on modeling issues using the machine description language LISA Andreas Hoffmann, Achim Nohl, Gunnar Braun, H. Meyr	2002	4
16	Generating production quality software development tools using a machine description language Design, Automation, and Test in Europe ·Andreas Hoffmann, Achim Nohl, Stefan Pees, Gunnar Braun, H. Meyr	2001	7
17	Optimized system synthesis of complex RT level building blocks from multirate dataflow graphs YuHyeong Jeong, H. Meyr	1999	9
18	Area Efficient Viterbi-Decoder Macros European Solid-State Circuits Conference ·Ayu Hendra, Vargas Guarderas, H. Meyr	1994	1
19	Phase-, frequency-locked loops and amplitude control CERN Document Server (European Organization for Nuclear Research) ·H. Meyr, Gerd Ascheid	1990	20
20	Theory of phase tracking systems of arbitrary order: Statistics of cycle slips and probability distribution of the state vector IEEE Transactions on Information Theory ·Naoe Yoshimi, H. Meyr	1978	13

About H. Meyr

H. Meyr is a scholar working on Hardware and Architecture, Computer Networks and Communications, Electrical and Electronic Engineering, Signal Processing and Computational Theory and Mathematics, having authored 292 papers that have together received 7.5k indexed citations. Recurring topics across this work include Advanced Wireless Communication Techniques (121 papers), Embedded Systems Design Techniques (117 papers), Parallel Computing and Optimization Techniques (96 papers), Wireless Communication Networks Research (71 papers), Interconnection Networks and Systems (56 papers), Error Correcting Code Techniques (40 papers), Real-Time Systems Scheduling (22 papers) and Advanced MIMO Systems Optimization (22 papers). The work is most often cited by research in Hardware and Architecture (2.2k citations), Computer Networks and Communications (4.1k citations), Signal Processing (1.1k citations), Electrical and Electronic Engineering (5.1k citations) and Computational Theory and Mathematics (588 citations). H. Meyr has collaborated with scholars based in Germany, United States and Switzerland. Frequent co-authors include Stefan A. Fechtel, M. Speth, G. Fock, M. Oerder, Gerd Ascheid, Marc Moeneclaey, Rainer Leupers, Gerhard Fettweis, V. Zivojnovic and Andreas Hoffmann. Their work appears in journals such as IEEE Transactions on Communications, IEEE Journal on Selected Areas in Communications, IEEE Communications Magazine, IEEE Transactions on Information Theory and IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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