E. Peralías

966 total citations
83 papers, 613 citations indexed

About

E. Peralías is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Hardware and Architecture. According to data from OpenAlex, E. Peralías has authored 83 papers receiving a total of 613 indexed citations (citations by other indexed papers that have themselves been cited), including 79 papers in Electrical and Electronic Engineering, 57 papers in Biomedical Engineering and 35 papers in Hardware and Architecture. Recurrent topics in E. Peralías's work include Analog and Mixed-Signal Circuit Design (57 papers), VLSI and Analog Circuit Testing (33 papers) and Advancements in PLL and VCO Technologies (29 papers). E. Peralías is often cited by papers focused on Analog and Mixed-Signal Circuit Design (57 papers), VLSI and Analog Circuit Testing (33 papers) and Advancements in PLL and VCO Technologies (29 papers). E. Peralías collaborates with scholars based in Spain, Uruguay and Germany. E. Peralías's co-authors include A. Rueda, J.L. Huertas, D. Vázquez, Rafaella Fiorelli, Fernando Silveira, Gloria Huertas, Gildas Léger, José L. Huertas, Antonio J. Acosta and Natividad Martínez Madrid and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Microwave Theory and Techniques and Electronics Letters.

In The Last Decade

E. Peralías

76 papers receiving 580 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
E. Peralías Spain	14	580	341	285	62	37	83	613
D. Vázquez Spain	14	497 0.9×	241 0.7×	400 1.4×	29 0.5×	64 1.7×	57	540
S. Brigati Italy	8	519 0.9×	475 1.4×	53 0.2×	63 1.0×	15 0.4×	23	547
J.-F. Naviner France	11	337 0.6×	118 0.3×	159 0.6×	30 0.5×	11 0.3×	55	377
David Nairn Canada	12	478 0.8×	373 1.1×	57 0.2×	63 1.0×	11 0.3×	38	510
Ken Chang United States	22	1.0k 1.8×	298 0.9×	125 0.4×	71 1.1×	44 1.2×	60	1.1k
F. Francesconi Italy	8	548 0.9×	513 1.5×	53 0.2×	64 1.0×	10 0.3×	24	574
J. Bastos Belgium	9	515 0.9×	389 1.1×	83 0.3×	37 0.6×	9 0.2×	14	531
Baher Haroun United States	15	628 1.1×	262 0.8×	160 0.6×	87 1.4×	7 0.2×	63	710
Jared Zerbe United States	19	1.2k 2.1×	434 1.3×	234 0.8×	122 2.0×	13 0.4×	46	1.3k
Yung-Fa Chou Taiwan	14	602 1.0×	76 0.2×	290 1.0×	83 1.3×	23 0.6×	63	641

Countries citing papers authored by E. Peralías

Since Specialization

Citations

This map shows the geographic impact of E. Peralías's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by E. Peralías with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites E. Peralías more than expected).

Fields of papers citing papers by E. Peralías

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by E. Peralías. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by E. Peralías. The network helps show where E. Peralías may publish in the future.

Co-authorship network of co-authors of E. Peralías

This figure shows the co-authorship network connecting the top 25 collaborators of E. Peralías. A scholar is included among the top collaborators of E. Peralías based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with E. Peralías. E. Peralías is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

Fiorelli, Rafaella, E. Peralías, Akash Kumar, et al.. (2023). CMOS Front End for Interfacing Spin-Hall Nano-Oscillators for Neuromorphic Computing in the GHz Range. Electronics. 12(1). 230–230.

Peralías, E., et al.. (2020). Calibration of Capacitor Mismatch and Static Comparator Offset in SAR ADC with Digital Redundancy. 1–5. 4 indexed citations

Fiorelli, Rafaella, et al.. (2019). Normalized Nonlinear Semiempirical MOST Model Used in Monolithic RF Class A-to-C PAs. Circuits Systems and Signal Processing. 39(6). 2796–2821. 1 indexed citations

Peralías, E., et al.. (2018). Description of SAR ADCs with Digital Redundancy using a Unified Hardware-Based Approach. 3003. 1–5. 5 indexed citations

Barragán, Manuel J., et al.. (2017). On the limits of machine learning-based test: A calibrated mixed-signal system case study. 79–84. 5 indexed citations

Peralías, E., et al.. (2012). Self-biased input common-mode generation for improving dynamic range and yield in inverter-based filters. DIGITAL.CSIC (Spanish National Research Council (CSIC)). 256–259. 1 indexed citations

Fiorelli, Rafaella, E. Peralías, & Fernando Silveira. (2011). LC-VCO Design Optimization Methodology Based on the $g_m/I_D$ Ratio for Nanometer CMOS Technologies. IEEE Transactions on Microwave Theory and Techniques. 59(7). 1822–1831. 45 indexed citations

Rueda, A., et al.. (2010). A 5 GHz LC-VCO with active common mode feedback circuit in sub-micrometer CMOS technology. DIGITAL.CSIC (Spanish National Research Council (CSIC)).

Léger, Gildas, et al.. (2010). On Chopper Effects in Discrete-Time $\Sigma\Delta$ Modulators. IEEE Transactions on Circuits and Systems I Regular Papers. 57(9). 2438–2449. 13 indexed citations

10.

Peralías, E., et al.. (2009). A survey on digital background calibration of ADCs. 101–104. 6 indexed citations

11.

Rueda, A., et al.. (2008). A 5GHz wide tuning range LC-VCO in sub-micrometer CMOS technology. 558–561. 6 indexed citations

12.

Peralías, E., et al.. (2008). Simple Evaluation of the Nonlinearity Signature of an ADC Using a Spectral Approach. VLSI design. 2008(1). 10 indexed citations

13.

Acosta, Antonio J., et al.. (2008). A 1.2V 5.14mW quadrature frequency synthesizer in 90nm CMOS technology for 2.4GHz ZigBee applications. DIGITAL.CSIC (Spanish National Research Council (CSIC)). 1252–1255. 6 indexed citations

14.

Peralías, E., et al.. (2005). Full Calibration Digital Techniques for Pipeline ADCs. 1976–1979. 4 indexed citations

15.

Léger, Gildas, E. Peralías, & A. Rueda. (2003). SNR probability in time-interleaved ADCs with random channel mismatches. II–380. 5 indexed citations

16.

Peralías, E., et al.. (2002). A Mixed-Signal Design Reuse Methodology Based on Parametric Behavioural Models with Non-Ideal Effects. Design, Automation, and Test in Europe. 310–314. 8 indexed citations

17.

Madrid, Natividad Martínez, E. Peralías, Antonio J. Acosta, & A. Rueda. (2002). Analog/mixed-signal IP modeling for design reuse. 766–767. 2 indexed citations

18.

Peralías, E., Antonio J. Acosta, A. Rueda, & José L. Huertas. (2000). A VHDL-based methodology for the design and verification of pipeline A/D converters. 534–538. 4 indexed citations

19.

Rueda, A., et al.. (1998). An approach to realistic fault prediction and layout design for testability in analog circuits. Design, Automation, and Test in Europe. 905–911. 4 indexed citations

20.

Peralías, E., A. Rueda, & José L. Huertas. (1995). Statistical behavioral modeling and characterization of A/D converters. International Conference on Computer Aided Design. 562–566. 2 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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