Dharmendra Singh Yadav

1.4k total citations
64 papers, 1.1k citations indexed

About

Dharmendra Singh Yadav is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Hardware and Architecture. According to data from OpenAlex, Dharmendra Singh Yadav has authored 64 papers receiving a total of 1.1k indexed citations (citations by other indexed papers that have themselves been cited), including 61 papers in Electrical and Electronic Engineering, 17 papers in Biomedical Engineering and 4 papers in Hardware and Architecture. Recurrent topics in Dharmendra Singh Yadav's work include Advancements in Semiconductor Devices and Circuit Design (58 papers), Semiconductor materials and devices (55 papers) and Integrated Circuits and Semiconductor Failure Analysis (21 papers). Dharmendra Singh Yadav is often cited by papers focused on Advancements in Semiconductor Devices and Circuit Design (58 papers), Semiconductor materials and devices (55 papers) and Integrated Circuits and Semiconductor Failure Analysis (21 papers). Dharmendra Singh Yadav collaborates with scholars based in India, United Kingdom and Saudi Arabia. Dharmendra Singh Yadav's co-authors include Dheeraj Sharma, Sukeshni Tirkey, Bhagwan Ram Raad, Shivendra Yadav, Kaushal Nigam, P. N. Kondekar, Deepika Singh, Sunil Pandey, Varun Bajaj and Dip Prakash Samajdar and has published in prestigious journals such as IEEE Transactions on Electron Devices, Applied Physics A and Current Applied Physics.

In The Last Decade

Dharmendra Singh Yadav

64 papers receiving 1.0k citations

Peers

Countries citing papers authored by Dharmendra Singh Yadav

Since Specialization

Citations

This map shows the geographic impact of Dharmendra Singh Yadav's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Dharmendra Singh Yadav with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Dharmendra Singh Yadav more than expected).

Fields of papers citing papers by Dharmendra Singh Yadav

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Dharmendra Singh Yadav. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Dharmendra Singh Yadav. The network helps show where Dharmendra Singh Yadav may publish in the future.

Co-authorship network of co-authors of Dharmendra Singh Yadav

This figure shows the co-authorship network connecting the top 25 collaborators of Dharmendra Singh Yadav. A scholar is included among the top collaborators of Dharmendra Singh Yadav based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Dharmendra Singh Yadav. Dharmendra Singh Yadav is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Ultra Thin Finger-Like Source Region-Based TFET: Temperature Sensor 2024 ·IEEE Sensors Letters ·(unknown), Ashish Raman, Dharmendra Singh Yadav, Naveen Kumar, Ankit Dixit, Md. Hasan Raza Ansari	5
2	Investigation of Temperature Impacts on I-V Characteristics to Analog/RF of Drain Underlap Based L-Shaped TFET 2024 ·(unknown), Ashish Raman, Amit Kumar, Ankit Dixit, (unknown), Dharmendra Singh Yadav	1
3	Assessment of temperature and ITCs on single gate L-shaped tunnel FET for low power high frequency application 2024 ·Engineering Research Express ·(unknown), Dharmendra Singh Yadav	2
4	Temperature Effect on Analog/RF and Linearity Parameters of Stacked Oxide TMG FinFET 2022 ·Silicon ·Dharmendra Singh Yadav, (unknown)	1
5	Design and Analysis of Low Power CMOS SRAM Cells 7T and 9T 2022 ·(unknown), Dharmendra Singh Yadav	2
6	3D Networking and Collaborative Environment for Online Education 2022 ·(unknown), Amit Chawla, (unknown), (unknown), Dharmendra Singh Yadav	8
7	Temperature impact on linearity and analog/RF performance metrics of a novel charge plasma tunnel FET 2021 ·Applied Physics A ·(unknown), (unknown), Dip Prakash Samajdar, Dharmendra Singh Yadav	8
8	Parametric Inspection of 6T SRAM Cell 2021 ·2021 5th International Conference on Trends in Electronics and Informatics (ICOEI) ·(unknown), Dharmendra Singh Yadav	3
9	Interface Trap Charges and their impact on Linearity and RF Performance metrics for a Heterodielectric Dual Metal Gate GaSb-Si Nanowire TFET 2021 ·(unknown), Dharmendra Singh Yadav	1
10	Effects of Linearity and Reliability Analysis for HGO-DW-SCTFET with Temperature Variation for High Frequency Application 2021 ·Silicon ·(unknown), Dharmendra Singh Yadav	4
11	Performance investigation of a novel GaAs1-xSbx-on-insulator (GASOI) FinFET: Role of interface trap charges and hetero dielectric 2020 ·Materials Today Communications ·Ankit Dixit, Dip Prakash Samajdar, Navjeet Bagga, Dharmendra Singh Yadav	12
12	Performance Analysis of TMG FinFETs for Low Power Application with Improved Analog/RF Characteristics 2020 ·(unknown), Dharmendra Singh Yadav, (unknown), (unknown), (unknown), Atul Kumar	3
13	Study of metal strip insertion and its optimization in doping less TFET 2018 ·Superlattices and Microstructures ·Dharmendra Singh Yadav, Abhishek Verma, Dheeraj Sharma, (unknown)	15
14	Effective design technique for improvement of electrostatics behaviour of dopingless TFET: proposal, investigation and optimisation 2018 ·Micro & Nano Letters ·M. Aslam, Dheeraj Sharma, Deepak Soni, Shivendra Yadav, Bhagwan Ram Raad, Dharmendra Singh Yadav, (unknown)	8
15	Performance Assessment of A Novel Vertical Dielectrically Modulated TFET-Based Biosensor 2017 ·IEEE Transactions on Electron Devices ·(unknown), Sukeshni Tirkey, Shivendra Yadav, Dheeraj Sharma, Dharmendra Singh Yadav	193
16	Temperature based performance analysis of doping-less tunnel field effect transistor 2017 ·Dharmendra Singh Yadav, Dheeraj Sharma, (unknown), (unknown), Sukeshni Tirkey, Bhagwan Ram Raad, Varun Bajaj	13
17	Controlling ambipolar behavior and improving radio frequency performance of hetero junction double gate TFET by dual work-function, hetero gate dielectric, gate underlap: Assessment and optimization 2017 ·Sukeshni Tirkey, Dharmendra Singh Yadav, Dheeraj Sharma	4
18	A novel gate and drain engineered charge plasma tunnel field-effect transistor for low sub-threshold swing and ambipolar nature 2016 ·Superlattices and Microstructures ·Dharmendra Singh Yadav, Bhagwan Ram Raad, Dheeraj Sharma	22
19	Dual workfunction hetero gate dielectric tunnel field-effect transistor performance analysis 2016 ·Dharmendra Singh Yadav, Dheeraj Sharma, Bhagwan Ram Raad, Varun Bajaj	13
20	SEED GERMINATION, SEEDLING GROWTH AND VIGOUR OF PAPAYA UNDER NORTH EAST INDIAN CONDITION 2010 ·Acta Horticulturae ·K. Dhinesh Babu, (unknown), (unknown), A. K. Singh, Dharmendra Singh Yadav, (unknown), B. C. Deka	23

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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