Deshanand P. Singh

1.2k citations

36 papers · 805 indexed · h-index 14

Hardware and Architecture top 1%
Electrical and Electronic Engineering top 10%
Computer Networks and Communications top 5%
Artificial Intelligence top 10%
Computational Theory and Mathematics top 10%

Co-authors: Stephen D. Brown Andrew C. Ling Mohamed S. Abdelfattah Andrei Hagiescu Tomasz Czajkowski Doris Chen Jan M. Rabaey Francky Catthoor
Topics: VLSI and FPGA Design Techniques (23 papers)VLSI and Analog Circuit Testing (19 papers)Low-power high-performance VLSI design (17 papers)
Cited by: Hardware and Architecture Computer Networks and Communications Electrical and Electronic Engineering
Journals: Proceedings of the IEEE IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Partner nations: Canada United States Belgium

In The Last Decade

Deshanand P. Singh

34 papers receiving 727 citations

Peers

Countries citing papers authored by Deshanand P. Singh

Since Specialization

Citations

This map shows the geographic impact of Deshanand P. Singh's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Deshanand P. Singh with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Deshanand P. Singh more than expected).

Fields of papers citing papers by Deshanand P. Singh

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Deshanand P. Singh. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Deshanand P. Singh. The network helps show where Deshanand P. Singh may publish in the future.

Co-authorship network of co-authors of Deshanand P. Singh

This figure shows the co-authorship network connecting the top 25 collaborators of Deshanand P. Singh. A scholar is included among the top collaborators of Deshanand P. Singh based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Deshanand P. Singh. Deshanand P. Singh is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	PEARL: Enabling Portable, Productive, and High-Performance Deep Reinforcement Learning using Heterogeneous Platforms 2024 ·Yuan Meng,Michael Kinsner,Deshanand P. Singh,Mahesh A. Iyer,Viktor K. Prasanna	1
2	High-Level Design Tools for Floating Point FPGAs 2015 ·Deshanand P. Singh,Bogdan Pasca,Tomasz Czajkowski	1
3	Profile-guided floating- to fixed-point conversion for hybrid FPGA-processor applications 2013 ·ACM Transactions on Architecture and Code Optimization ·Doris Chen,Deshanand P. Singh	1
4	Harnessing the power of FPGAs using altera's OpenCL compiler 2013 ·Deshanand P. Singh,Tomasz Czajkowski,Andrew C. Ling	15
5	From opencl to high-performance hardware on FPGAS 2012 ·Tomasz Czajkowski,Utku Aydonat,(unknown),John Freeman,Michael Kinsner,(unknown),(unknown),Peter Yiannacouras,Deshanand P. Singh	153
6	Invited paper: Using OpenCL to evaluate the efficiency of CPUS, GPUS and FPGAS for information filtering 2012 ·Doris Chen,Deshanand P. Singh	29
7	A comprehensive approach to modeling, characterizing and optimizing for metastability in FPGAs 2010 ·Doris Chen,Deshanand P. Singh,(unknown),David Lewis,(unknown),(unknown),Vaughn Betz	18
8	Predicting Interconnect Delay for Physical Synthesis in a FPGA CAD Flow 2007 ·IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·(unknown),(unknown),Deshanand P. Singh,Stephen D. Brown	14
9	Incremental placement for structured ASICs using the transportation problem 2007 ·Andrew C. Ling,Deshanand P. Singh,Stephen D. Brown	1
10	FPGA programmable logic block evaluation using quantified Boolean satisfiability 2006 ·IEE Proceedings - Computers and Digital Techniques ·Andrew C. Ling,Deshanand P. Singh,Stephen D. Brown	5
11	Two-stage physical synthesis for FPGAs 2006 ·Deshanand P. Singh,(unknown),Stephen D. Brown	8
12	Difficulty of predicting interconnect delay in a timing driven FPGA CAD flow 2006 ·(unknown),(unknown),Deshanand P. Singh,Stephen D. Brown	12
13	An area-efficient timing closure technique for FPGAs using Shannon's expansion 2006 ·IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Deshanand P. Singh,Stephen D. Brown	0
14	Mapping Arbitrary Logic Functions into Synchronous Embedded Memories For Area Reduction on FPGAs 2006 ·Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design ·(unknown),Deshanand P. Singh,(unknown),Stephen D. Brown	1
15	Post-placement BDD-based decomposition for FPGAs 2005 ·(unknown),Deshanand P. Singh,Stephen D. Brown	7
16	The Quartus University Interface Program: enabling advanced FPGA research 2005 ·Shivani Malhotra,(unknown),Deshanand P. Singh,Stephen D. Brown	10
17	FPGA technology mapping: a study of optimality 2005 ·(unknown),Deshanand P. Singh,(unknown)	8
18	Incremental retiming for FPGA physical synthesis 2005 ·Deshanand P. Singh,(unknown),Stephen D. Brown	3
19	Incremental retiming for FPGA physical synthesis 2005 ·Deshanand P. Singh,(unknown),Stephen D. Brown	12
20	Incremental placement for layout driven optimizations on FPGAs 2002 ·Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design ·Deshanand P. Singh,Stephen D. Brown	25

About Deshanand P. Singh

Deshanand P. Singh is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Computational Theory and Mathematics, having authored 36 papers that have together received 805 indexed citations. Recurring topics across this work include VLSI and FPGA Design Techniques (23 papers), VLSI and Analog Circuit Testing (19 papers) and Low-power high-performance VLSI design (17 papers). The work is most often cited by research in Hardware and Architecture (636 citations), Computer Networks and Communications (281 citations) and Electrical and Electronic Engineering (445 citations). Deshanand P. Singh has collaborated with scholars based in Canada, United States and Belgium. Frequent co-authors include Stephen D. Brown, Andrew C. Ling, Mohamed S. Abdelfattah, Andrei Hagiescu, Tomasz Czajkowski, Doris Chen, Jan M. Rabaey, Francky Catthoor, Neeta Sehgal and Thomas J. Mozdzen. Their work appears in journals such as Proceedings of the IEEE, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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