Peter Yiannacouras
- Hardware and Architecture top 1%
- Computer Networks and Communications top 5%
- Electrical and Electronic Engineering
- Artificial Intelligence
- Computer Vision and Pattern Recognition
- Co-authors
- Jonathan RoseJ. Gregory SteffanUtku AydonatMichael KinsnerTomasz CzajkowskiJohn FreemanDeshanand P. SinghTaeweon Suh
- Topics
- Parallel Computing and Optimization Techniques (15 papers)Interconnection Networks and Systems (11 papers)Embedded Systems Design Techniques (11 papers)
- Cited by
- Hardware and ArchitectureComputer Networks and CommunicationsElectrical and Electronic Engineering
- Journals
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsIEEE Transactions on Very Large Scale Integration (VLSI) SystemsACM Transactions on Reconfigurable Technology and Systems
- Partner nations
- CanadaUnited StatesUnited Kingdom
In The Last Decade
Peter Yiannacouras
15 papers receiving 525 citations
Peers
Comparison fields: 5 of 35
- Hardware and Architecture 481
- Computer Networks and Communications 324
- Electrical and Electronic Engineering 148
- Artificial Intelligence 54
- Computer Vision and Pattern Recognition 40
Countries citing papers authored by Peter Yiannacouras
This map shows the geographic impact of Peter Yiannacouras's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Peter Yiannacouras with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Peter Yiannacouras more than expected).
Fields of papers citing papers by Peter Yiannacouras
This network shows the impact of papers produced by Peter Yiannacouras. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Peter Yiannacouras. The network helps show where Peter Yiannacouras may publish in the future.
Co-authorship network of co-authors of Peter Yiannacouras
This figure shows the co-authorship network connecting the top 25 collaborators of Peter Yiannacouras. A scholar is included among the top collaborators of Peter Yiannacouras based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Peter Yiannacouras. Peter Yiannacouras is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 2 | |
| 2 | OpenCL for FPGAs: Prototyping a Compiler | 27 |
| 3 | 153 | |
| 4 | 21 | |
| 5 | 15 | |
| 6 | 9 | |
| 7 | 78 | |
| 8 | 6 | |
| 9 | 22 | |
| 10 | 27 | |
| 11 | 10 | |
| 12 | 44 | |
| 13 | 47 | |
| 14 | 69 | |
| 15 | 21 |
About Peter Yiannacouras
Peter Yiannacouras is a scholar working on Hardware and Architecture, Computer Networks and Communications and Information Systems, having authored 15 papers that have together received 551 indexed citations. Recurring topics across this work include Parallel Computing and Optimization Techniques (15 papers), Interconnection Networks and Systems (11 papers) and Embedded Systems Design Techniques (11 papers). The work is most often cited by research in Hardware and Architecture (481 citations), Computer Networks and Communications (324 citations) and Electrical and Electronic Engineering (148 citations). Peter Yiannacouras has collaborated with scholars based in Canada, United States and United Kingdom. Frequent co-authors include Jonathan Rose, J. Gregory Steffan, Utku Aydonat, Michael Kinsner, Tomasz Czajkowski, John Freeman, Deshanand P. Singh, Taeweon Suh, Shih‐Lien L. Lu and Michael Konow. Their work appears in journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems and ACM Transactions on Reconfigurable Technology and Systems.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.