D. Bruni
- Hardware and Architecture top 2%
- Computer Networks and Communications top 5%
- Electrical and Electronic Engineering
- Artificial Intelligence
- Automotive Engineering
- Co-authors
- Luca BeniniAlberto MaciiMassimo PoncinoEnrico MaciiFranco FummiDavide BertozziVittorio ZaccariaR. Zafalon
- Topics
- Parallel Computing and Optimization Techniques (10 papers)Embedded Systems Design Techniques (10 papers)Interconnection Networks and Systems (6 papers)
- Journals
- ComputerIEEE Transactions on ComputersIEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Partner nations
- ItalyBelgiumNetherlands
In The Last Decade
D. Bruni
17 papers receiving 346 citations
Peers
Comparison fields: 5 of 26
- Hardware and Architecture 286
- Computer Networks and Communications 232
- Electrical and Electronic Engineering 119
- Artificial Intelligence 50
- Automotive Engineering 38
Countries citing papers authored by D. Bruni
This map shows the geographic impact of D. Bruni's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by D. Bruni with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites D. Bruni more than expected).
Fields of papers citing papers by D. Bruni
This network shows the impact of papers produced by D. Bruni. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by D. Bruni. The network helps show where D. Bruni may publish in the future.
Co-authorship network of co-authors of D. Bruni
This figure shows the co-authorship network connecting the top 25 collaborators of D. Bruni. A scholar is included among the top collaborators of D. Bruni based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with D. Bruni. D. Bruni is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 8 | |
| 2 | 9 | |
| 3 | 10 | |
| 4 | 88 | |
| 5 | 6 | |
| 6 | 30 | |
| 7 | 20 | |
| 8 | 0 | |
| 9 | 6 | |
| 10 | 47 | |
| 11 | 17 | |
| 12 | Scenario-based SDRAM-Energy-Aware Scheduling for Dynamic Multi-Media Applications on Multi-Processor Platforms. | 3 |
| 13 | 52 | |
| 14 | 8 | |
| 15 | 6 | |
| 16 | 0 | |
| 17 | 2 | |
| 18 | A Power Modeling and Estimation Framework for VLIW-based Embedded Systems | 44 |
| 19 | 16 |
About D. Bruni
D. Bruni is a scholar working on Hardware and Architecture, Computer Networks and Communications and Automotive Engineering, having authored 19 papers that have together received 372 indexed citations. Recurring topics across this work include Parallel Computing and Optimization Techniques (10 papers), Embedded Systems Design Techniques (10 papers) and Interconnection Networks and Systems (6 papers). The work is most often cited by research in Hardware and Architecture (286 citations), Computer Networks and Communications (232 citations) and Automotive Engineering (38 citations). D. Bruni has collaborated with scholars based in Italy, Belgium and Netherlands. Frequent co-authors include Luca Benini, Alberto Macii, Massimo Poncino, Enrico Macii, Franco Fummi, Davide Bertozzi, Vittorio Zaccaria, R. Zafalon, Cristina Silvano and B. Riccò. Their work appears in journals such as Computer, IEEE Transactions on Computers and IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.