Davide Bertozzi

5.3k total citations · 1 hit paper
163 papers, 3.6k citations indexed

About

Davide Bertozzi is a scholar working on Computer Networks and Communications, Electrical and Electronic Engineering and Hardware and Architecture. According to data from OpenAlex, Davide Bertozzi has authored 163 papers receiving a total of 3.6k indexed citations (citations by other indexed papers that have themselves been cited), including 107 papers in Computer Networks and Communications, 96 papers in Electrical and Electronic Engineering and 85 papers in Hardware and Architecture. Recurrent topics in Davide Bertozzi's work include Interconnection Networks and Systems (98 papers), Parallel Computing and Optimization Techniques (55 papers) and Embedded Systems Design Techniques (54 papers). Davide Bertozzi is often cited by papers focused on Interconnection Networks and Systems (98 papers), Parallel Computing and Optimization Techniques (55 papers) and Embedded Systems Design Techniques (54 papers). Davide Bertozzi collaborates with scholars based in Italy, Spain and Germany. Davide Bertozzi's co-authors include Luca Benini, Giovanni De Micheli, Stergios Stergiou, José Flich, Simone Medardoni, Srinivasan Murali, Antoine Jalabert, Federico Angiolini, Alessandro Bogliolo and Giovanni Capranico and has published in prestigious journals such as Nucleic Acids Research, SHILAP Revista de lepidopterología and Optics Express.

In The Last Decade

Davide Bertozzi

154 papers receiving 3.4k citations

Hit Papers

NoC synthesis flow for customized domain specific multipr... 2005 2026 2012 2019 2005 100 200 300 400

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Davide Bertozzi Italy 30 2.6k 2.1k 1.8k 289 166 163 3.6k
Dajin Wang United States 23 1.2k 0.5× 320 0.2× 627 0.3× 81 0.3× 77 0.5× 93 1.4k
Jangwoo Kim South Korea 23 855 0.3× 983 0.5× 1.0k 0.6× 61 0.2× 35 0.2× 90 1.9k
Limei Lin China 25 919 0.3× 285 0.1× 976 0.5× 122 0.4× 73 0.4× 108 1.8k
Michihiro Koibuchi Japan 20 1.5k 0.6× 720 0.3× 939 0.5× 152 0.5× 22 0.1× 166 1.6k
Hideharu Amano Japan 18 1.3k 0.5× 1.1k 0.5× 1.1k 0.6× 125 0.4× 39 0.2× 349 2.0k
Lih‐Hsing Hsu Taiwan 30 2.8k 1.1× 650 0.3× 1.3k 0.7× 254 0.9× 55 0.3× 142 3.0k
Davide Patti Italy 14 705 0.3× 528 0.2× 607 0.3× 147 0.5× 30 0.2× 79 1.1k
Lewis Mackenzie United Kingdom 17 857 0.3× 171 0.1× 455 0.3× 80 0.3× 43 0.3× 123 1.0k
R. Guerrieri Italy 28 252 0.1× 322 0.2× 1.1k 0.6× 16 0.1× 146 0.9× 143 2.4k
Maurizio Palesi Italy 25 2.0k 0.8× 1.5k 0.7× 1.5k 0.8× 377 1.3× 13 0.1× 159 2.7k

Countries citing papers authored by Davide Bertozzi

Since Specialization
Citations

This map shows the geographic impact of Davide Bertozzi's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Davide Bertozzi with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Davide Bertozzi more than expected).

Fields of papers citing papers by Davide Bertozzi

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Davide Bertozzi. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Davide Bertozzi. The network helps show where Davide Bertozzi may publish in the future.

Co-authorship network of co-authors of Davide Bertozzi

This figure shows the co-authorship network connecting the top 25 collaborators of Davide Bertozzi. A scholar is included among the top collaborators of Davide Bertozzi based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Davide Bertozzi. Davide Bertozzi is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Bellodi, Elena, et al.. (2023). Efficient Resource-Aware Neural Architecture Search with a Neuro-Symbolic Approach. Institutional Research Information System University of Ferrara (University of Ferrara). 171–178.
2.
Tseng, Tsun‐Ming, et al.. (2020). PSION+: Combining Logical Topology and Physical Layout Optimization for Wavelength-Routed ONoCs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 39(12). 5197–5210. 14 indexed citations
3.
Bertozzi, Davide, et al.. (2018). Understanding the Design Space of Wavelength-Routed Optical NoC Topologies for Power-Performance Optimization. Institutional Research Information System University of Ferrara (University of Ferrara). 255–260. 2 indexed citations
4.
Bertozzi, Davide, et al.. (2017). A tool for synthesizing power-efficient and custom-tailored wavelength-routed optical rings. IEEE Conference Proceedings. 2017. 300–305. 1 indexed citations
5.
Flich, José, et al.. (2015). Synergistic use of multiple on-chip networks for ultra-low latency and scalable distributed routing reconfiguration. Design, Automation, and Test in Europe. 806–811. 5 indexed citations
6.
Grani, Paolo, et al.. (2014). Assessing the energy break-even point between an optical NoC architecture and an aggressive electronic baseline. Design, Automation, and Test in Europe. 308. 18 indexed citations
7.
Grani, Paolo, et al.. (2013). Contrasting wavelength-routed optical NoC topologies for power-efficient 3D-stacked multicore processors using physical-layer analysis. Design, Automation, and Test in Europe. 1589–1594. 37 indexed citations
8.
Abellán, José Luis, Juan Fernández, Manuel E. Acacio, et al.. (2012). Design of a collective communication infrastructure for barrier synchronization in cluster-based nanoscale MPSoCs. Design, Automation, and Test in Europe. 491–496. 6 indexed citations
9.
Zambelli, Cristian, Marco Indaco, Stefano Di Carlo, et al.. (2012). A cross-layer approach for new reliability-performance trade-offs in MLC NAND flash memories. Design, Automation, and Test in Europe. 881–886. 20 indexed citations
10.
Bertozzi, Davide, et al.. (2011). Chapter 6. The Synchronization Challenge. Research Explorer (The University of Manchester). 1 indexed citations
11.
Ludovici, Daniele, et al.. (2010). Design space exploration of a mesochronous link for cost-effective and flexible GALS NOCs. Institutional Research Information System University of Ferrara (University of Ferrara). 17. 679–684. 10 indexed citations
12.
Paci, Giacomo, Davide Bertozzi, & Luca Benini. (2009). Effectiveness of adaptive supply voltage and body bias as post-silicon variability compensation techniques for full-swing and low-swing on-chip communication channels. Design, Automation, and Test in Europe. 1404–1409. 5 indexed citations
13.
Ludovici, Daniele, Francisco Jurado Gilabert, Simone Medardoni, et al.. (2009). Assessing fat-tree topologies for regular network-on-chip design under nanoscale technology constraints. Design, Automation, and Test in Europe. 562–565. 27 indexed citations
14.
Medardoni, Simone, et al.. (2007). Interactive presentation: Capturing the interaction of the communication, memory and I/O subsystems in memory-centric industrial MPSoC platforms. Design, Automation, and Test in Europe. 660–665. 3 indexed citations
15.
Acquaviva, Andrea, et al.. (2006). Supporting Task Migration in MPSoCs: A Feasibility Study. PORTO Publications Open Repository TOrino (Politecnico di Torino). 9 indexed citations
16.
Acquaviva, Andrea, et al.. (2006). Supporting Task Migration in Multi-Processor Systems-on-Chip: A Feasibility Study. Institutional Research Information System University of Ferrara (University of Ferrara). 1–6. 106 indexed citations
17.
Ruggiero, Martino, Andrea Acquaviva, Davide Bertozzi, & Luca Benini. (2006). Application-specific power-aware workload allocation for voltage scalable MPSoC platforms. Institutional Research Information System University of Ferrara (University of Ferrara). 87–93. 25 indexed citations
18.
Stergiou, Stergios, Federico Angiolini, Salvatore Carta, et al.. (2005). ×pipes Lite: A Synthesis Oriented Design Library For Networks on Chips. SPIRE - Sciences Po Institutional REpository.
19.
Benini, Luca, et al.. (2005). Measuring Efficiency and Executability of Allocation and Scheduling in Multi-Processor Systems-on-Chip. Archivio istituzionale della ricerca (Alma Mater Studiorum Università di Bologna). 2. 13–21. 1 indexed citations
20.
Bertozzi, Davide, Antoine Jalabert, Srinivasan Murali, et al.. (2005). NoC synthesis flow for customized domain specific multiprocessor systems-on-chip. IEEE Transactions on Parallel and Distributed Systems. 16(2). 113–129. 426 indexed citations breakdown →

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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