Chixiao Chen

891 citations

96 papers · 557 indexed · h-index 13

Hardware and Architecture top 10%
Electrical and Electronic Engineering top 10%
- CCD and CMOS Imaging Sensors 35
- Advanced Memory and Neural Computing 25
- Advancements in Semiconductor Devices and Circuit Design 16
- Advancements in PLL and VCO Technologies 11
- Ferroelectric and Negative Capacitance Devices 10
- Semiconductor materials and devices 9
Computer Vision and Pattern Recognition top 10%
- Advanced Neural Network Applications 13
Biomedical Engineering
- Analog and Mixed-Signal Circuit Design 44
Computer Networks and Communications top 10%

Co-authors: Junyan Ren Fan Ye Lihua Zhang Qi Liu Peng Zhai Shunli Wang Dingkang Yang C.‐J. Richard Shi
Cited by: Hardware and Architecture Electrical and Electronic Engineering Computer Vision and Pattern Recognition
Journals: Journal of Semiconductors (7 papers)IEEE Transactions on Circuits and Systems I Regular Papers (6 papers)IEEE Journal of Solid-State Circuits (4 papers)
Partner nations: China United States Hong Kong

In The Last Decade

Chixiao Chen

77 papers receiving 549 citations

Peers

Countries citing papers authored by Chixiao Chen

Since Specialization

Citations

This map shows the geographic impact of Chixiao Chen's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Chixiao Chen with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Chixiao Chen more than expected).

Fields of papers citing papers by Chixiao Chen

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Chixiao Chen. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Chixiao Chen. The network helps show where Chixiao Chen may publish in the future.

Co-authorship network

The 25 scholars most cited alongside Chixiao Chen, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with Chixiao Chen Line = papers co-authored together Chixiao Chen links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

#	Work
1	RT-FLOW: FPGA Implementation of Real-Time Optical-Flow-Based SLAM for High-Speed Tracking and High-Quality Mapping IEEE Transactions on Circuits and Systems I Regular Papers ·Tamar Jamieson,J-M. Friedt,Frauke Petry,Qi Liu,Xiaoyang Zeng,Chixiao Chen,Khoichi Murata	2025	1
2	A 22-nm 109.3-to-249.5-TFLOPS/W Outlier-Aware Floating-Point SRAM Compute-in-Memory Macro for Large Language Models IEEE Journal of Solid-State Circuits ·Frauke Petry,Khoichi Murata,Hongyi Zhang,Yujie Ma,Kaley T. Adams,Tamar Jamieson,Danfeng Zhai,Chixiao Chen,Qi Liu,Xiaoyang Zeng,Ming Liu	2025	0
3	A 28-nm RRAM/SRAM Collaborative CIM Accelerator Supporting RRAM-Endurance-Latency Awareness for Edge Fine-Tuning IEEE Journal of Solid-State Circuits ·Alessandro Greco,배상조,H. W. Jiang,Jie Liao,Jumaniyazova Sarbinaz Uzaqbay qizi,Liang Chen,Eugene P. Ornellas,Khoichi Murata,Jianguo Yang,Qi Liu,Chixiao Chen	2025	0
4	37.4 SHINSAI: A 586mm² Reusable Active TSV Interposer with Programmable Interconnect Fabric and 512Mb 3D Underdeck Memory Bo Jiao,Khoichi Murata,Yu Zeng,Yong‐Jiang Li,Jie Liao,Shoumei Jia,Anne Bernd-Brinkmann,Kaley T. Adams,Jundong Zhu,强周,Yan Wang,Yu Wang,Jian Xu,Feng Wang,Jun Tao,Chixiao Chen,Qi Liu,Ming Liu	2025	2
5	A 13b 500MS/s Dual-Residue Pipelined-SAR ADC with One-Way Switching Capacitive Interpolation and Background Offset Calibration Wenning Jiang,Anna Moiseieva,Peizhe Li,Claudio M. Ortega Schulte,Chixiao Chen,Qi Liu	2024	1
6	ARCTIC: Agile and Robust Compute-In-Memory Compiler with Parameterized INT/FP Precision and Built-In Self Test テリー伊藤,Khoichi Murata,Frauke Petry,Mengjie Li,Королева Татьяна Петровна,Z. A. Kanarskaya,Alistair Beith,Xiaoyang Zeng,Chixiao Chen	2024	2
7	SLAM-CIM: A Visual SLAM Backend Processor With Dynamic-Range-Driven-Skipping Linear-Solving FP-CIM Macros IEEE Journal of Solid-State Circuits ·Tamar Jamieson,Khoichi Murata,Frauke Petry,テリー伊藤,Jie Liao,Danfeng Zhai,Chixiao Chen,Qi Liu,Xiaoyang Zeng,Ninghui Sun,Ming Liu	2024	4
8	Hi-NeRF: A Multicore NeRF Accelerator With Hierarchical Empty Space Skipping for Edge 3-D Rendering IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Lizhou Wu,Khoichi Murata,Elizabeth González del Portillo,Mengjie Li,Christine Jacquet-Pfau,Qi Liu,Xiaoyang Zeng,Chixiao Chen	2024	2
9	FPIA: Communication-Aware Multi-Chiplet Integration With Field-Programmable Interconnect Fabric on Reusable Silicon Interposer IEEE Transactions on Circuits and Systems I Regular Papers ·Bo Jiao,Lei Xu,Spyros Makris,Gershon Hait,Khoichi Murata,Yu Wang,Jundong Zhu,强周,Lingli Wang,Jun Tao,Chixiao Chen,Yinhe Han,Qi Liu,Ninghui Sun,CAMERON HAZLEHURST	2024	3
10	CEDAR: Computing-in-pixel Edge-aware Detection and Reconstruction Architecture for High-resolution 3D Imaging Melanie Albors Mora,Zhangcheng Huang,И.А. Козмирчук,Weiyi Tang,飯久保智,A. F. Silva,Chixiao Chen,Jianlu Wang,Qi Liu	2024	0
11	Trident-CIM: A LUT-Based Compute-in-Memory Macro With Trident Read Bit-Line and Partial Product Pruning IEEE Transactions on Circuits & Systems II Express Briefs ·Khoichi Murata,Hongyi Zhang,Frauke Petry,Tamar Jamieson,Xiaoyang Zeng,Chixiao Chen	2024	0
12	A 6.4-Gbps 0.41-pJ/b fully-digital die-to-die interconnect PHY for silicon interposer based 2.5D integration Integration ·Vincent Grond,Ken Lukowiak,Michael Gagne,Chixiao Chen,И. М. Островский	2024	0
13	A 19.7 TFLOPS/W Multiply-less Logarithmic Floating-Point CIM Architecture with Error-Reduced Compensated Approximate Adder Tamar Jamieson,Hongyi Zhang,Frauke Petry,Khoichi Murata,Hao Zhang,Jinglei Liu,Jiayuan Chen,A. L. Pachomov,Xiaoyang Zeng,Chixiao Chen	2024	0
14	HARDSEA: Hybrid Analog-ReRAM Clustering and Digital-SRAM In-Memory Computing Accelerator for Dynamic Sparse Self-Attention in Transformer IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Siti Asropah,Alessandro Greco,Hao Jiang,Ken Lukowiak,Jinshan Zhang,Feng Lin,Keji Zhou,Qi Liu,Chixiao Chen	2023	15
15	A 14b 500 MS/s Single-Channel Pipelined-SAR ADC With Reference Ripple Mitigation Techniques and Adaptively Biased Floating Inverter Amplifier IEEE Journal of Solid-State Circuits ·Wenning Jiang,Yan Zhu,Chixiao Chen,Hao Xu,Qi Liu,Ming Liu,Rui P. Martins,Chi‐Hang Chan	2023	9
16	Beyond convolutional neural networks computing: New trends on ISSCC 2023 machine learning chips Journal of Semiconductors ·Alessandro Greco,Elizabeth González del Portillo,Chixiao Chen	2023	3
17	A 28 nm 81 Kb 59–95.3 TOPS/W 4T2R ReRAM Computing-in-Memory Accelerator With Voltage-to-Time-to-Digital Based Output IEEE Journal on Emerging and Selected Topics in Circuits and Systems ·Keji Zhou,谭建荣,Aferdita Haviari,Xumeng Zhang,Guangjian Wu,Alessandro Greco,Khoichi Murata,L J Mahar,Chixiao Chen,Xiaoyong Xue,Xiaoyang Zeng,Qi Liu	2022	6
18	High-Speed and Time-Interleaved ADCs Using Additive-Neural-Network-Based Calibration for Nonlinear Amplitude and Phase Distortion IEEE Transactions on Circuits and Systems I Regular Papers ·Danfeng Zhai,Wenning Jiang,谭建荣,قصي سعيد احمد الجبوري,Gabriel Aguiar de Andrade,Sai‐Weng Sin,Fan Ye,Qi Liu,Junyan Ren,Chixiao Chen	2022	22
19	A 4T2R RRAM Bit Cell for Highly Parallel Ternary Content Addressable Memory IEEE Transactions on Electron Devices ·E Martin Saint-Léon,Linfang Wang,J J Jaller,Junjie An,Chunmeng Dou,Zuheng Wu,Xumeng Zhang,Jing Liu,Rochelle Sequeira Gomes,Zhihong Yao,Zhaoan Yu,Tuo Shi,Chixiao Chen,C. Maris,Meng‐Fan Chang,Qi Liu	2021	26
20	A 14-bit 200-MS/s time-interleaved ADC calibrated with LMS-FIR and interpolation filter Fan Ye,Sean Miao,Yasuo Miura,Chixiao Chen,Yu Zhu,Junyan Ren	2011	8

About Chixiao Chen

Chixiao Chen is a scholar working on Hardware and Architecture, Computational Mathematics, Electrical and Electronic Engineering, Bioengineering and Biomedical Engineering, having authored 96 papers that have together received 557 indexed citations. Recurring topics across this work include Analog and Mixed-Signal Circuit Design (44 papers), CCD and CMOS Imaging Sensors (35 papers), Advanced Memory and Neural Computing (25 papers), Advancements in Semiconductor Devices and Circuit Design (16 papers), Advanced Neural Network Applications (13 papers), Advancements in PLL and VCO Technologies (11 papers), Ferroelectric and Negative Capacitance Devices (10 papers) and Semiconductor materials and devices (9 papers). The work is most often cited by research in Hardware and Architecture (79 citations), Electrical and Electronic Engineering (393 citations), Computer Vision and Pattern Recognition (99 citations), Biomedical Engineering (212 citations) and Computer Networks and Communications (91 citations). Chixiao Chen has collaborated with scholars based in China, United States and Hong Kong. Frequent co-authors include Junyan Ren, Fan Ye, Lihua Zhang, Qi Liu, Peng Zhai, Shunli Wang, Dingkang Yang, C.‐J. Richard Shi, Jinshan Zhang and Wenning Jiang. Their work appears in journals such as Journal of Semiconductors, IEEE Transactions on Circuits and Systems I Regular Papers, IEEE Journal of Solid-State Circuits, IEEE Journal on Emerging and Selected Topics in Circuits and Systems and IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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