Visvesh Sathe

1.2k total citations
66 papers, 877 citations indexed

About

Visvesh Sathe is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Artificial Intelligence. According to data from OpenAlex, Visvesh Sathe has authored 66 papers receiving a total of 877 indexed citations (citations by other indexed papers that have themselves been cited), including 55 papers in Electrical and Electronic Engineering, 33 papers in Biomedical Engineering and 6 papers in Artificial Intelligence. Recurrent topics in Visvesh Sathe's work include Low-power high-performance VLSI design (33 papers), Analog and Mixed-Signal Circuit Design (32 papers) and Advancements in PLL and VCO Technologies (14 papers). Visvesh Sathe is often cited by papers focused on Low-power high-performance VLSI design (33 papers), Analog and Mixed-Signal Circuit Design (32 papers) and Advancements in PLL and VCO Technologies (14 papers). Visvesh Sathe collaborates with scholars based in United States, China and Switzerland. Visvesh Sathe's co-authors include Marios C. Papaefthymiou, Venkata Rajesh Pamula, Jacques C. Rudell, Steve I. Perlmutter, Samuel Naffziger, Sung Kim, Armin Alaghi, Luís Ceze, Michael D. Seeman and Elad Alon and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and IEEE Transactions on Circuits and Systems I Regular Papers.

In The Last Decade

Visvesh Sathe

60 papers receiving 847 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Visvesh Sathe United States 18 740 323 136 119 78 66 877
Arindam Sanyal United States 18 958 1.3× 778 2.4× 123 0.9× 97 0.8× 125 1.6× 94 1.2k
Bai‐Sun Kong South Korea 17 1.3k 1.7× 331 1.0× 196 1.4× 98 0.8× 219 2.8× 93 1.4k
Alicia Klinefelter United States 12 760 1.0× 241 0.7× 67 0.5× 228 1.9× 123 1.6× 19 1.0k
Santosh Kumar Vishvakarma India 22 1.3k 1.8× 211 0.7× 35 0.3× 238 2.0× 98 1.3× 149 1.6k
Yongtae Kim South Korea 13 597 0.8× 178 0.6× 56 0.4× 117 1.0× 116 1.5× 81 754
Linxiao Shen China 22 1.3k 1.7× 933 2.9× 182 1.3× 173 1.5× 137 1.8× 76 1.6k
Joyce Kwong United States 12 899 1.2× 417 1.3× 38 0.3× 161 1.4× 23 0.3× 18 1.0k
Jeremy Holleman United States 16 1.1k 1.4× 588 1.8× 520 3.8× 381 3.2× 108 1.4× 58 1.4k
Longyang Lin China 14 513 0.7× 263 0.8× 64 0.5× 75 0.6× 29 0.4× 86 619
Anh Tuan Singapore 13 506 0.7× 73 0.2× 119 0.9× 163 1.4× 73 0.9× 78 652

Countries citing papers authored by Visvesh Sathe

Since Specialization
Citations

This map shows the geographic impact of Visvesh Sathe's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Visvesh Sathe with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Visvesh Sathe more than expected).

Fields of papers citing papers by Visvesh Sathe

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Visvesh Sathe. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Visvesh Sathe. The network helps show where Visvesh Sathe may publish in the future.

Co-authorship network of co-authors of Visvesh Sathe

This figure shows the co-authorship network connecting the top 25 collaborators of Visvesh Sathe. A scholar is included among the top collaborators of Visvesh Sathe based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Visvesh Sathe. Visvesh Sathe is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Mandal, Arindam, et al.. (2022). An All-Digital 1 Mbps, 57 pJ/bit Bluetooth Low Energy (BLE) Backscatter ASIC in 65 nm CMOS. Infoscience (Ecole Polytechnique Fédérale de Lausanne). 109–113. 5 indexed citations
2.
Mandal, Arindam, et al.. (2021). Improving SIMO-Regulated Digital SoC Energy Efficiencies Through Adaptive Clocking and Concurrent Domain Control. IEEE Journal of Solid-State Circuits. 57(1). 90–102. 6 indexed citations
3.
4.
Sathe, Visvesh, et al.. (2020). UniCaP-2: Phase-Locked Adaptive Clocking with Rapid Clock Cycle Recovery in 65nm CMOS. 1–2. 5 indexed citations
5.
Shen, Yi, Xiyuan Tang, Linxiao Shen, et al.. (2019). A 10-bit 120-MS/s SAR ADC With Reference Ripple Cancellation Technique. IEEE Journal of Solid-State Circuits. 55(3). 680–692. 18 indexed citations
6.
7.
Kim, Sung, et al.. (2019). A Unified Clock and Switched-Capacitor-Based Power Delivery Architecture for Variation Tolerance in Low-Voltage SoC Domains. IEEE Journal of Solid-State Circuits. 54(4). 1173–1184. 27 indexed citations
8.
9.
Kim, Sung, et al.. (2018). MATIC: Learning around errors for efficient low-voltage neural network accelerators. 1–6. 35 indexed citations
10.
Kim, Sung, et al.. (2018). Energy-Efficient Neural Network Acceleration in the Presence of Bit-Level Memory Errors. IEEE Transactions on Circuits and Systems I Regular Papers. 65(12). 4285–4298. 33 indexed citations
11.
Sathe, Visvesh, et al.. (2018). Adversarial Audio Super-Resolution with Unsupervised Feature Losses. 4 indexed citations
12.
13.
Sathe, Visvesh. (2014). Quasi-resonant clocking. 87–92. 4 indexed citations
14.
Sathe, Visvesh, et al.. (2012). Resonant clock design for a power-efficient high-volume x86–64 microprocessor. 68–70. 7 indexed citations
15.
Le, Hanh‐Phuc, Michael D. Seeman, Seth R. Sanders, et al.. (2010). A 32nm fully integrated reconfigurable switched-capacitor DC-DC converter delivering 0.55W/mm<sup>2</sup> at 81% efficiency. 210–211. 72 indexed citations
16.
Sathe, Visvesh, et al.. (2009). A resonant-clock 200MHz ARM926EJ-S<sup>TM</sup> microcontroller. 356–359. 7 indexed citations
17.
Sathe, Visvesh. (2007). Hybrid resonant -clocked digital design.. Deep Blue (University of Michigan). 4 indexed citations
18.
Sathe, Visvesh, et al.. (2007). RF2: A 1GHz FIR Filter with Distributed Resonant Clock Generator. 44–45. 8 indexed citations
19.
Sathe, Visvesh, Marios C. Papaefthymiou, & Conrad H. Ziesler. (2005). Boost Logic: A High Speed Energy Recovery Circuit Family. 22–27. 3 indexed citations
20.
Ziesler, Conrad H., Joohee Kim, Visvesh Sathe, & Marios C. Papaefthymiou. (2003). A 225 MHz resonant clocked ASIC chip. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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