C. Zukowski

712 total citations
50 papers, 505 citations indexed

About

C. Zukowski is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, C. Zukowski has authored 50 papers receiving a total of 505 indexed citations (citations by other indexed papers that have themselves been cited), including 36 papers in Electrical and Electronic Engineering, 21 papers in Hardware and Architecture and 14 papers in Computer Networks and Communications. Recurrent topics in C. Zukowski's work include Low-power high-performance VLSI design (26 papers), Advancements in Semiconductor Devices and Circuit Design (18 papers) and VLSI and FPGA Design Techniques (11 papers). C. Zukowski is often cited by papers focused on Low-power high-performance VLSI design (26 papers), Advancements in Semiconductor Devices and Circuit Design (18 papers) and VLSI and FPGA Design Techniques (11 papers). C. Zukowski collaborates with scholars based in United States and Germany. C. Zukowski's co-authors include George Gristede, Albert E. Ruehli, John L. Wyatt, M. B. Friedman, P. Penfield, A. A. Renshaw, Robert McClintock, Stephen Kosonocky, Dimitris Anastassiou and Ilias Tagkopoulos and has published in prestigious journals such as IEEE Transactions on Communications, IEEE Transactions on Computers and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

In The Last Decade

C. Zukowski

41 papers receiving 462 citations

Peers

Countries citing papers authored by C. Zukowski

Since Specialization

Citations

This map shows the geographic impact of C. Zukowski's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by C. Zukowski with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites C. Zukowski more than expected).

Fields of papers citing papers by C. Zukowski

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by C. Zukowski. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by C. Zukowski. The network helps show where C. Zukowski may publish in the future.

Co-authorship network of co-authors of C. Zukowski

This figure shows the co-authorship network connecting the top 25 collaborators of C. Zukowski. A scholar is included among the top collaborators of C. Zukowski based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with C. Zukowski. C. Zukowski is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Characteristics of MS-CMOS logic in sub-32nm technologies 2010 ·(unknown), (unknown), C. Zukowski	1
2	A Low-Leakage High-Speed Monotonic Static CMOS 64b Adder in a Dual Gate Oxide 65-nm CMOS Technology 2006 ·(unknown), C. Zukowski	1
3	Proceedings of the 14th ACM Great Lakes symposium on VLSI 2004 ·David Garrett, John Lach, C. Zukowski	2
4	A custom FPGA for the simulation of gene regulatory networks 2003 ·Ilias Tagkopoulos, C. Zukowski, (unknown), Dimitris Anastassiou	6
5	Variable reduction in MOS timing models 2003 ·C. Zukowski, (unknown)	0
6	A matched-delay CMOS TDM multiplexer cell 2003 ·C. Zukowski, Kam Man Shum	0
7	Jitter due to signal history in digital logic circuits and its control strategies 2002 ·1993 IEEE International Symposium on Circuits and Systems ·(unknown), C. Zukowski	3
8	Buffer size trade-offs in input/output buffered ATM switches under various conditions 2002 ·(unknown), (unknown), C. Zukowski, O. Wing	2
9	Use of selective precharge for low-power on the match lines of content-addressable memories 2002 ·C. Zukowski, (unknown)	18
10	Measuring error propagation in waveform relaxation algorithms 2002 ·C. Zukowski, George Gristede, Albert E. Ruehli	0
11	Comparison of a wide range of differential CMOS logic topologies 2002 ·(unknown), (unknown), C. Zukowski	2
12	Metastability of SOI CMOS latches 2002 ·(unknown), C.T. Chuang, Lewis M. Terman, C.J. Anderson, C. Zukowski	0
13	Power reduction in large fan-in CMOS gates in logic arrays using selective precharge 2002 ·C. Zukowski, (unknown)	5
14	CMOS transistor sizing for minimization of energy-delay product 2002 ·(unknown), C. Zukowski	10
15	An efficient macromodel for static CMOS multi-port memories 2002 ·P. T. Landsberg, (unknown), C. Zukowski	1
16	Measuring error propagation in waveform relaxation algorithms 1999 ·IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications ·George Gristede, C. Zukowski, Albert E. Ruehli	5
17	High-speed data transmission using low-frequency clocks 1991 ·IEEE Transactions on Circuits and Systems ·C. Zukowski	6
18	Differential high-bandwidth communication circuits 1990 ·C. Zukowski, (unknown)	6
19	The cylinder switch: an architecture for a manageable VLSI giga-cell switch 1990 ·(unknown), G. Pacifici, C. Zukowski	5
20	The Bounding Approach to VLSI Circuit Simulation 1986 ·C. Zukowski	16

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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