Anees Ullah

623 total citations
43 papers, 357 citations indexed

About

Anees Ullah is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, Anees Ullah has authored 43 papers receiving a total of 357 indexed citations (citations by other indexed papers that have themselves been cited), including 30 papers in Electrical and Electronic Engineering, 25 papers in Hardware and Architecture and 15 papers in Computer Networks and Communications. Recurrent topics in Anees Ullah's work include Radiation Effects in Electronics (25 papers), VLSI and Analog Circuit Testing (16 papers) and Low-power high-performance VLSI design (10 papers). Anees Ullah is often cited by papers focused on Radiation Effects in Electronics (25 papers), VLSI and Analog Circuit Testing (16 papers) and Low-power high-performance VLSI design (10 papers). Anees Ullah collaborates with scholars based in Pakistan, Spain and Italy. Anees Ullah's co-authors include Pedro Reviriego, Luca Sterpone, Juan Antonio Maestro, Salvatore Pontarelli, M. Sonza Reorda, Zhen Gao, Ernesto Sánchez, Zhen Gao, Alexis Ramos and Asier Ibeas and has published in prestigious journals such as IEEE Access, IEEE Transactions on Computers and IEEE Transactions on Nuclear Science.

In The Last Decade

Anees Ullah

39 papers receiving 341 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Anees Ullah Pakistan 13 239 175 99 60 40 43 357
Mariusz Rawski Poland 11 176 0.7× 212 1.2× 76 0.8× 86 1.4× 29 0.7× 68 412
Jens Hagemeyer Germany 10 170 0.7× 206 1.2× 130 1.3× 39 0.7× 25 0.6× 48 327
V.C. Alves Brazil 11 142 0.6× 236 1.3× 189 1.9× 67 1.1× 19 0.5× 39 386
Chunsheng Liu China 10 148 0.6× 152 0.9× 96 1.0× 42 0.7× 28 0.7× 36 288
Tim Todman United Kingdom 8 163 0.7× 314 1.8× 187 1.9× 58 1.0× 15 0.4× 39 414
Brandon Blodget United States 6 179 0.7× 440 2.5× 259 2.6× 35 0.6× 26 0.7× 7 497
S. Ravi United States 11 220 0.9× 379 2.2× 183 1.8× 117 1.9× 15 0.4× 42 493
A.E. Salama Egypt 9 370 1.5× 364 2.1× 37 0.4× 66 1.1× 134 3.4× 37 503
Sunil Shukla United States 10 182 0.8× 263 1.5× 205 2.1× 73 1.2× 43 1.1× 41 447
Oliver Diessel Australia 12 218 0.9× 333 1.9× 207 2.1× 60 1.0× 13 0.3× 56 443

Countries citing papers authored by Anees Ullah

Since Specialization
Citations

This map shows the geographic impact of Anees Ullah's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Anees Ullah with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Anees Ullah more than expected).

Fields of papers citing papers by Anees Ullah

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Anees Ullah. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Anees Ullah. The network helps show where Anees Ullah may publish in the future.

Co-authorship network of co-authors of Anees Ullah

This figure shows the co-authorship network connecting the top 25 collaborators of Anees Ullah. A scholar is included among the top collaborators of Anees Ullah based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Anees Ullah. Anees Ullah is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
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Liu, Shanshan, Pedro Reviriego, Anees Ullah, Ahmed Louri, & Fabrizio Lombardi. (2023). Error-Resilient Data Compression With Tunstall Codes. IEEE Transactions on Circuits and Systems I Regular Papers. 70(5). 1963–1975.
4.
Gao, Zhen, et al.. (2023). Efficient Protection of FPGA Implemented LDPC Decoders Against Single Event Upsets (SEUs) on Configuration Memories. IEEE Transactions on Circuits and Systems I Regular Papers. 70(9). 3770–3780. 1 indexed citations
5.
Ullah, Shahid, et al.. (2022). LDBPR: Latest Database of Protein Research. 5(1). 3 indexed citations
6.
Reviriego, Pedro, et al.. (2022). Toward Optimal Softcore Carry-aware Approximate Multipliers on Xilinx FPGAs. ACM Transactions on Embedded Computing Systems. 22(4). 1–19. 2 indexed citations
7.
Gao, Zhen, Yi Yao, Xiaohui Wei, et al.. (2022). Reliability evaluation of FPGA based pruned neural networks. Microelectronics Reliability. 130. 114498–114498. 10 indexed citations
8.
Ullah, Anees, et al.. (2021). VR-ZYCAP: A Versatile Resourse-Level ICAP Controller for ZYNQ SOC. Electronics. 10(8). 899–899. 2 indexed citations
9.
Ullah, Anees, et al.. (2021). Efficient Leading Zero Count (LZC) Implementations for Xilinx FPGAs. IEEE Embedded Systems Letters. 14(1). 35–38. 4 indexed citations
10.
Ullah, Anees, et al.. (2020). FracTCAM: Fracturable LUTRAM-Based TCAM Emulation on Xilinx FPGAs. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 28(12). 2726–2730. 7 indexed citations
11.
Ullah, Anees, et al.. (2020). Isolation Design Flow Effectiveness Evaluation Methodology for Zynq SoCs. Electronics. 9(5). 814–814. 5 indexed citations
12.
Reviriego, Pedro, Anees Ullah, & Salvatore Pontarelli. (2019). PR-TCAM: Efficient TCAM Emulation on Xilinx FPGAs Using Partial Reconfiguration. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 27(8). 1952–1956. 22 indexed citations
13.
Ullah, Anees, Pedro Reviriego, Alfonso Sánchez‐Macián, & Juan Antonio Maestro. (2018). Multiple Cell Upset Injection in BRAMs for Xilinx FPGAs. IEEE Transactions on Device and Materials Reliability. 18(4). 636–638. 5 indexed citations
14.
Ullah, Anees, et al.. (2017). An FPGA-based dynamically reconfigurable platform for emulation of permanent faults in ASICs. Microelectronics Reliability. 75. 110–120. 12 indexed citations
15.
Ramos, Alexis, Anees Ullah, Pedro Reviriego, & Juan Antonio Maestro. (2017). Efficient Protection of the Register File in Soft-Processors Implemented on Xilinx FPGAs. IEEE Transactions on Computers. 67(2). 299–304. 17 indexed citations
16.
Ullah, Anees, et al.. (2017). Improving the Hardware Complexity by Exploiting the Reduced Dynamics-Based Fractional Order Systems. IEEE Access. 5. 7714–7723. 14 indexed citations
17.
Reorda, M. Sonza, Luca Sterpone, & Anees Ullah. (2016). An Error-Detection and Self-Repairing Method for Dynamically and Partially Reconfigurable Systems. IEEE Transactions on Computers. 66(6). 1022–1033. 18 indexed citations
18.
Ullah, Anees & Luca Sterpone. (2014). Recovery Time and Fault Tolerance Improvement for Circuits mapped on SRAM-based FPGAs. Journal of Electronic Testing. 30(4). 425–442. 5 indexed citations
19.
Sánchez, Ernesto, Luca Sterpone, & Anees Ullah. (2014). Effective emulation of permanent faults in ASICs through dynamically reconfigurable FPGAs. 1–6. 7 indexed citations
20.
Sterpone, Luca, et al.. (2013). Dynamic neutron testing of Dynamically Reconfigurable Processing Modules architecture. Science and Technology Facilities Council. 184–188. 3 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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