Allon Adir

605 total citations
21 papers, 327 citations indexed

About

Allon Adir is a scholar working on Hardware and Architecture, Computational Theory and Mathematics and Software. According to data from OpenAlex, Allon Adir has authored 21 papers receiving a total of 327 indexed citations (citations by other indexed papers that have themselves been cited), including 14 papers in Hardware and Architecture, 11 papers in Computational Theory and Mathematics and 11 papers in Software. Recurrent topics in Allon Adir's work include Software Testing and Debugging Techniques (11 papers), Formal Methods in Verification (10 papers) and VLSI and Analog Circuit Testing (9 papers). Allon Adir is often cited by papers focused on Software Testing and Debugging Techniques (11 papers), Formal Methods in Verification (10 papers) and VLSI and Analog Circuit Testing (9 papers). Allon Adir collaborates with scholars based in Israel, United States and France. Allon Adir's co-authors include Gil Shurek, Avi Ziv, Laurent Sébastien Fournier, Michal Rimon, Michael Vinov, Amir Nahir, Hagit Attiya, Alon Ziv, Yoav Katz and Ehud Aharoni and has published in prestigious journals such as IEEE Transactions on Parallel and Distributed Systems, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and UEA Digital Repository (University of East Anglia).

In The Last Decade

Allon Adir

19 papers receiving 303 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Allon Adir Israel 10 254 133 108 75 66 21 327
Gil Shurek Israel 10 295 1.2× 130 1.0× 158 1.5× 149 2.0× 67 1.0× 13 405
Hoang M. Le Germany 12 290 1.1× 171 1.3× 124 1.1× 159 2.1× 44 0.7× 37 418
Daniel Geist Israel 8 172 0.7× 72 0.5× 97 0.9× 130 1.7× 42 0.6× 22 270
Michal Rimon Israel 7 198 0.8× 89 0.7× 134 1.2× 103 1.4× 28 0.4× 16 291
A. Ferrari Portugal 9 310 1.2× 93 0.7× 48 0.4× 109 1.5× 155 2.3× 30 402
Michael Vinov Israel 5 167 0.7× 72 0.5× 102 0.9× 84 1.1× 24 0.4× 10 241
Derek L. Beatty United States 7 332 1.3× 189 1.4× 114 1.1× 263 3.5× 37 0.6× 11 453
Srivaths Ravi United States 11 334 1.3× 296 2.2× 40 0.4× 47 0.6× 75 1.1× 43 419
Thomas J. Sheffler United States 5 214 0.8× 135 1.0× 22 0.2× 63 0.8× 65 1.0× 13 262
Éric Jenn France 6 236 0.9× 219 1.6× 95 0.9× 34 0.5× 65 1.0× 13 326

Countries citing papers authored by Allon Adir

Since Specialization
Citations

This map shows the geographic impact of Allon Adir's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Allon Adir with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Allon Adir more than expected).

Fields of papers citing papers by Allon Adir

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Allon Adir. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Allon Adir. The network helps show where Allon Adir may publish in the future.

Co-authorship network of co-authors of Allon Adir

This figure shows the co-authorship network connecting the top 25 collaborators of Allon Adir. A scholar is included among the top collaborators of Allon Adir based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Allon Adir. Allon Adir is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Aharoni, Ehud, et al.. (2023). HeLayers: A Tile Tensors Framework for Large Neural Networks on Encrypted Data. Proceedings on Privacy Enhancing Technologies. 2023(1). 325–342. 12 indexed citations
2.
Adir, Allon, et al.. (2017). Big data analysis of cloud storage logs using spark. 1–1. 1 indexed citations
3.
Adir, Allon, et al.. (2014). Verification of Transactional Memory in POWER8. 1–6. 11 indexed citations
4.
Adir, Allon, et al.. (2014). Using a high-level test generation expert system for testing in-car networks. 13. 1–6. 1 indexed citations
5.
Adir, Allon, Amir Nahir, & Avi Ziv. (2012). Concurrent Generation of Concurrent Programs for Post-Silicon Validation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 31(8). 1297–1302. 8 indexed citations
6.
Adir, Allon, et al.. (2011). Threadmill. 860–865. 24 indexed citations
7.
Adir, Allon, et al.. (2011). A unified methodology for pre-silicon verification and post-silicon validation. 47 indexed citations
8.
9.
Adir, Allon, et al.. (2007). A framework for the validation of processor architecture compliance. Proceedings - ACM IEEE Design Automation Conference. 902–902. 2 indexed citations
10.
Adir, Allon, et al.. (2007). A Framework for the Validation of Processor Architecture Compliance. Proceedings - ACM IEEE Design Automation Conference. 902–905. 1 indexed citations
11.
12.
Rimon, Michal, et al.. (2006). Addressing Test Generation Challenges for Configurable Processor Verification. 95–101. 1 indexed citations
13.
Adir, Allon, et al.. (2005). VLIW. UEA Digital Repository (University of East Anglia). 779–779.
14.
Adir, Allon, et al.. (2005). A generic micro-architectural test plan approach for microprocessor verification. 769–769. 9 indexed citations
15.
Adir, Allon, et al.. (2004). Piparazzi: a test program generator for micro-architecture flow verification. 13. 23–28. 8 indexed citations
16.
Adir, Allon, et al.. (2004). Genesys-pro: innovations in test program generation for functional processor verification. IEEE Design & Test of Computers. 21(2). 84–93. 113 indexed citations
17.
Adir, Allon, et al.. (2003). Adaptive test program generation: planning for the unplanned. 14. 83–88. 7 indexed citations
18.
Adir, Allon & Gil Shurek. (2003). Generating concurrent test-programs with collisions for multi-processor verification. 77–82. 19 indexed citations
19.
Adir, Allon, Hagit Attiya, & Gil Shurek. (2003). Information-flow models for shared memory with an application to the powerPC architecture. IEEE Transactions on Parallel and Distributed Systems. 14(5). 502–515. 24 indexed citations
20.
Adir, Allon, et al.. (2002). Improving test quality through resource reallocation. 14. 64–69. 6 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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