Gil Shurek

641 total citations
13 papers, 405 citations indexed

About

Gil Shurek is a scholar working on Hardware and Architecture, Computer Networks and Communications and Software. According to data from OpenAlex, Gil Shurek has authored 13 papers receiving a total of 405 indexed citations (citations by other indexed papers that have themselves been cited), including 8 papers in Hardware and Architecture, 6 papers in Computer Networks and Communications and 6 papers in Software. Recurrent topics in Gil Shurek's work include Software Testing and Debugging Techniques (6 papers), VLSI and Analog Circuit Testing (4 papers) and Embedded Systems Design Techniques (4 papers). Gil Shurek is often cited by papers focused on Software Testing and Debugging Techniques (6 papers), VLSI and Analog Circuit Testing (4 papers) and Embedded Systems Design Techniques (4 papers). Gil Shurek collaborates with scholars based in Israel and United States. Gil Shurek's co-authors include Allon Adir, Avi Ziv, Yossi Lichtenstein, Amir Nahir, Y. Naveh, Michal Rimon, Yoav Katz, Michael Vinov, Hagit Attiya and Alon Ziv and has published in prestigious journals such as IEEE Transactions on Parallel and Distributed Systems, IBM Systems Journal and AI Magazine.

In The Last Decade

Gil Shurek

12 papers receiving 373 citations

Peers

Gil Shurek
Harry Foster United States
Hoang M. Le Germany
Allon Adir Israel
Congguang Yang United States
Per Bjesse United States
J.C. Madre United States
Harry Foster United States
Gil Shurek
Citations per year, relative to Gil Shurek Gil Shurek (= 1×) peers Harry Foster

Countries citing papers authored by Gil Shurek

Since Specialization
Citations

This map shows the geographic impact of Gil Shurek's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Gil Shurek with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Gil Shurek more than expected).

Fields of papers citing papers by Gil Shurek

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Gil Shurek. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Gil Shurek. The network helps show where Gil Shurek may publish in the future.

Co-authorship network of co-authors of Gil Shurek

This figure shows the co-authorship network connecting the top 25 collaborators of Gil Shurek. A scholar is included among the top collaborators of Gil Shurek based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Gil Shurek. Gil Shurek is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

13 of 13 papers shown
1.
Shurek, Gil, et al.. (2019). Risk Analysis Based On Design Version Control Data. 1–6. 1 indexed citations
2.
Adir, Allon, et al.. (2011). Threadmill. 860–865. 24 indexed citations
3.
Adir, Allon, et al.. (2011). A unified methodology for pre-silicon verification and post-silicon validation. 47 indexed citations
5.
Rimon, Michal, et al.. (2010). Ontology-Based Tools in the Service of Hardware Verification.. Software Engineering and Knowledge Engineering. 303–308. 1 indexed citations
6.
Shurek, Gil, et al.. (2010). An ontology and constraint based approach to cache preloading. 51. 129–136.
7.
Naveh, Y., et al.. (2007). Constraint-Based Random Stimuli Generation for Hardware Verification. AI Magazine. 28(3). 13–30. 45 indexed citations
8.
Naveh, Y., et al.. (2006). Constraint-based random stimuli generation for hardware verification. 1720–1727. 32 indexed citations
9.
Adir, Allon & Gil Shurek. (2003). Generating concurrent test-programs with collisions for multi-processor verification. 77–82. 19 indexed citations
10.
Adir, Allon, Hagit Attiya, & Gil Shurek. (2003). Information-flow models for shared memory with an application to the powerPC architecture. IEEE Transactions on Parallel and Distributed Systems. 14(5). 502–515. 24 indexed citations
11.
Shurek, Gil, et al.. (2002). Using a constraint satisfaction formulation and solution techniques for random test program generation. IBM Systems Journal. 41(3). 386–402. 55 indexed citations
12.
Lewin, Daniel R., et al.. (2002). Constraint satisfaction for test program generation. 4. 45–48. 16 indexed citations
13.
Lichtenstein, Yossi, et al.. (1995). Test program generation for functional verification of PowerPC processors in IBM. UEA Digital Repository (University of East Anglia). 279–285. 124 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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