Yuji Osaki

617 total citations
22 papers, 494 citations indexed

About

Yuji Osaki is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Cellular and Molecular Neuroscience. According to data from OpenAlex, Yuji Osaki has authored 22 papers receiving a total of 494 indexed citations (citations by other indexed papers that have themselves been cited), including 22 papers in Electrical and Electronic Engineering, 18 papers in Biomedical Engineering and 2 papers in Cellular and Molecular Neuroscience. Recurrent topics in Yuji Osaki's work include Advancements in Semiconductor Devices and Circuit Design (18 papers), Analog and Mixed-Signal Circuit Design (18 papers) and Low-power high-performance VLSI design (12 papers). Yuji Osaki is often cited by papers focused on Advancements in Semiconductor Devices and Circuit Design (18 papers), Analog and Mixed-Signal Circuit Design (18 papers) and Low-power high-performance VLSI design (12 papers). Yuji Osaki collaborates with scholars based in Japan. Yuji Osaki's co-authors include Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa, Kei Matsumoto, Osamu Kobayashi, Takao Onoye and Masanori Hashimoto and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, Japanese Journal of Applied Physics and IEICE Transactions on Electronics.

In The Last Decade

Yuji Osaki

22 papers receiving 478 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Yuji Osaki Japan 8 468 387 45 43 18 22 494
Hsin‐Shu Chen Taiwan 13 591 1.3× 465 1.2× 34 0.8× 44 1.0× 26 1.4× 47 613
Tejasvi Anand United States 15 706 1.5× 304 0.8× 127 2.8× 57 1.3× 17 0.9× 53 737
T. Miyaba Japan 5 686 1.5× 563 1.5× 38 0.8× 90 2.1× 26 1.4× 9 708
H. Shiga Japan 6 709 1.5× 557 1.4× 37 0.8× 100 2.3× 24 1.3× 13 738
Chao-Cheng Lee Taiwan 16 840 1.8× 422 1.1× 71 1.6× 43 1.0× 10 0.6× 48 859
Ningxi Liu United States 12 290 0.6× 147 0.4× 42 0.9× 37 0.9× 15 0.8× 20 342
D. Draxelmayr Austria 11 392 0.8× 189 0.5× 37 0.8× 56 1.3× 5 0.3× 26 413
Mohamed El-Nozahi Egypt 11 599 1.3× 350 0.9× 27 0.6× 11 0.3× 24 1.3× 45 634
E.C. Dijkmans Netherlands 10 467 1.0× 399 1.0× 19 0.4× 33 0.8× 13 0.7× 25 504
Debashis Mandal United States 12 406 0.9× 222 0.6× 19 0.4× 20 0.5× 18 1.0× 38 430

Countries citing papers authored by Yuji Osaki

Since Specialization
Citations

This map shows the geographic impact of Yuji Osaki's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Yuji Osaki with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Yuji Osaki more than expected).

Fields of papers citing papers by Yuji Osaki

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Yuji Osaki. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Yuji Osaki. The network helps show where Yuji Osaki may publish in the future.

Co-authorship network of co-authors of Yuji Osaki

This figure shows the co-authorship network connecting the top 25 collaborators of Yuji Osaki. A scholar is included among the top collaborators of Yuji Osaki based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Yuji Osaki. Yuji Osaki is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Hirose, Tetsuya, et al.. (2014). A Fully On-Chip, 6.66-kHz, 320-nA, 56ppm/°C, CMOS Relaxation Oscillator with PVT Variation Compensation Circuit. IEICE Transactions on Electronics. E97.C(6). 512–518. 4 indexed citations
2.
Osaki, Yuji, Tetsuya Hirose, Nobutaka Kuroki, & Masahiro Numa. (2013). 1.2-V Supply, 100-nW, 1.09-V Bandgap and 0.7-V Supply, 52.5-nW, 0.55-V Subbandgap Reference Circuits for Nanowatt CMOS LSIs. IEEE Journal of Solid-State Circuits. 48(6). 1530–1538. 222 indexed citations
3.
Hirose, Tetsuya, et al.. (2013). A 0.8-V 110-nA CMOS current reference circuit using subthreshold operation. IEICE Electronics Express. 10(4). 20130022–20130022. 6 indexed citations
4.
5.
Osaki, Yuji, Tetsuya Hirose, Nobutaka Kuroki, & Masahiro Numa. (2012). A Low-Power Level Shifter With Logic Error Correction for Extremely Low-Voltage Digital CMOS LSIs. IEEE Journal of Solid-State Circuits. 47(7). 1776–1783. 95 indexed citations
6.
Hirose, Tetsuya, et al.. (2012). A nano-watt power CMOS amplifier with adaptive biasing for power-aware analog LSIs. 69–72. 11 indexed citations
7.
Osaki, Yuji, Tetsuya Hirose, Nobutaka Kuroki, & Masahiro Numa. (2011). A wide input voltage range level shifter circuit for extremely low-voltage digital LSIs. IEICE Electronics Express. 8(12). 890–896. 5 indexed citations
8.
Hirose, Tetsuya, et al.. (2011). High current efficiency sense amplifier using body-bias control for ultra-low-voltage SRAM. 31. 1–4. 4 indexed citations
9.
Osaki, Yuji, Tetsuya Hirose, Nobutaka Kuroki, & Masahiro Numa. (2011). A level shifter circuit design by using input/output voltage monitoring technique for ultra-low voltage digital CMOS LSIs. 201–204. 7 indexed citations
10.
Osaki, Yuji, Tetsuya Hirose, Nobutaka Kuroki, & Masahiro Numa. (2011). Temperature-Compensated Nano-Ampere Current Reference Circuit with Subthreshold Metal–Oxide–Semiconductor Field-Effect Transistor Resistor Ladder. Japanese Journal of Applied Physics. 50(4S). 04DE08–04DE08. 5 indexed citations
11.
Hirose, Tetsuya, et al.. (2011). A 105-nW CMOS thermal sensor for power-aware applications. 1265–1268. 1 indexed citations
12.
Osaki, Yuji, Tetsuya Hirose, Kei Matsumoto, Nobutaka Kuroki, & Masahiro Numa. (2011). Robust Subthreshold CMOS Digital Circuit Design with On-Chip Adaptive Supply Voltage Scaling Technique. IEICE Transactions on Electronics. E94-C(1). 80–88. 1 indexed citations
13.
Matsumoto, Kei, Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, & Masahiro Numa. (2011). Subthreshold SRAM with Write Assist Technique Using On-Chip Threshold Voltage Monitoring Circuit. IEICE Transactions on Electronics. E94-C(6). 1042–1048. 1 indexed citations
14.
Osaki, Yuji, Tetsuya Hirose, Nobutaka Kuroki, & Masahiro Numa. (2011). A 95-nA, 523ppm/°C, 0.6-μW CMOS current reference circuit with subthreshold MOS resistor ladder. 113–114. 3 indexed citations
15.
Osaki, Yuji, Tetsuya Hirose, Nobutaka Kuroki, & Masahiro Numa. (2011). A level shifter with logic error correction circuit for extremely low-voltage digital CMOS LSIs. 199–202. 7 indexed citations
16.
Osaki, Yuji, Tetsuya Hirose, Nobutaka Kuroki, & Masahiro Numa. (2010). Nano-ampere CMOS current reference with little temperature dependence using small offset voltage. 668–671. 8 indexed citations
17.
Osaki, Yuji, Tetsuya Hirose, Nobutaka Kuroki, & Masahiro Numa. (2010). Temperature Compensated Nano-Ampere CMOS Current Reference Circuit Using Small Offset Voltage. 1 indexed citations
18.
Hirose, Tetsuya, Yuji Osaki, Nobutaka Kuroki, & Masahiro Numa. (2010). A nano-ampere current reference circuit and its temperature dependence control by using temperature characteristics of carrier mobilities. 114–117. 81 indexed citations
19.
Matsumoto, Kei, Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, & Masahiro Numa. (2009). Switching-voltage detection and compensation circuits for ultra-low-voltage CMOS inverters. 42. 483–486. 1 indexed citations
20.
Osaki, Yuji, Tetsuya Hirose, Kei Matsumoto, Nobutaka Kuroki, & Masahiro Numa. (2009). Delay-compensation techniques for ultra-low-power subthreshold CMOS digital LSIs. 42. 503–506. 8 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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