Yijin Guan

2.7k total citations · 1 hit paper
12 papers, 1.8k citations indexed

About

Yijin Guan is a scholar working on Hardware and Architecture, Artificial Intelligence and Computer Networks and Communications. According to data from OpenAlex, Yijin Guan has authored 12 papers receiving a total of 1.8k indexed citations (citations by other indexed papers that have themselves been cited), including 9 papers in Hardware and Architecture, 6 papers in Artificial Intelligence and 5 papers in Computer Networks and Communications. Recurrent topics in Yijin Guan's work include Parallel Computing and Optimization Techniques (7 papers), Advanced Data Storage Technologies (4 papers) and Advanced Memory and Neural Computing (3 papers). Yijin Guan is often cited by papers focused on Parallel Computing and Optimization Techniques (7 papers), Advanced Data Storage Technologies (4 papers) and Advanced Memory and Neural Computing (3 papers). Yijin Guan collaborates with scholars based in China, United States and Hong Kong. Yijin Guan's co-authors include Guangyu Sun, Jason Cong, Chen Zhang, Peng Li, Bingjun Xiao, Zhihang Yuan, Ningyi Xu, Hao Liang, Wěi Zhāng and Wenqiang Wang and has published in prestigious journals such as IEEE Access, IEEE Transactions on Computers and IEEE Transactions on Parallel and Distributed Systems.

In The Last Decade

Yijin Guan

10 papers receiving 1.8k citations

Hit Papers

align trajectories

What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if it has ≥500 total citations, achieves ≥1.5× the top-1% citation threshold for papers in the same subfield and year (this is the minimum needed to enter the top 1%, not the average within it), or reaches the top citation threshold in at least one of its specific research topics.

Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks

2015 1.5k citations Chen Zhang, Peng Li et al. profile →

Peers

Countries citing papers authored by Yijin Guan

Since Specialization

Citations

This map shows the geographic impact of Yijin Guan's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Yijin Guan with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Yijin Guan more than expected).

Fields of papers citing papers by Yijin Guan

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Yijin Guan. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Yijin Guan. The network helps show where Yijin Guan may publish in the future.

Co-authorship network of co-authors of Yijin Guan

This figure shows the co-authorship network connecting the top 25 collaborators of Yijin Guan. A scholar is included among the top collaborators of Yijin Guan based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Yijin Guan. Yijin Guan is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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12 of 12 papers shown

#	Work	Indexed citations
1	MemTunnel: A CXL-Based Rack-Scale Host Memory Pooling Architecture for Cloud Service 2025 ·IEEE Transactions on Parallel and Distributed Systems ·(unknown), Yijin Guan, Zhaoyang Du, (unknown), (unknown), Zhao Wang, Teng Ma, Zheng Liu, (unknown), Yuan Xie, Mingyu Gao, (unknown), Hongzhong Zheng, Dimin Niu	0
2	C T X N L: A Software-Hardware Co-designed Solution for Efficient CXL-Based Transaction Processing 2025 ·(unknown), (unknown), (unknown), Yijin Guan, Dimin Niu, (unknown), (unknown), Xingda Wei, (unknown)	0
3	Salus: A Practical Trusted Execution Environment for CPU-FPGA Heterogeneous Cloud Platforms 2024 ·Rare & Special e-Zone (The Hong Kong University of Science and Technology) ·(unknown), (unknown), (unknown), (unknown), (unknown), (unknown), Yijin Guan, Dimin Niu, Mingyu Gao, Yuan Xie, Feifei Li	1
4	Predicting the Output Structure of Sparse Matrix Multiplication with Sampled Compression Ratio 2023 ·Rare & Special e-Zone (The Hong Kong University of Science and Technology) ·(unknown), Yijin Guan, (unknown), Dimin Niu, Nianxiong Tan, Xiaopeng Yu, Hongzhong Zheng, Jianyi Meng, (unknown), Yuan Xie	1
5	Accelerating CPU-Based Sparse General Matrix Multiplication With Binary Row Merging 2022 ·IEEE Access ·(unknown), Yijin Guan, (unknown), Dimin Niu, Hongzhong Zheng, Yuan Xie	1
6	OpSparse: A Highly Optimized Framework for Sparse General Matrix Multiplication on GPUs 2022 ·IEEE Access ·(unknown), Yijin Guan, (unknown), Dimin Niu, (unknown), Hongzhong Zheng, Yuan Xie	5
7	Flatfish: A Reinforcement Learning Approach for Application-Aware Address Mapping 2022 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·(unknown), Zhihang Yuan, Yijin Guan, Guangyu Sun, Tao Zhang, (unknown), Dimin Niu	1
8	PIMulator-NN: An Event-Driven, Cross-Level Simulation Framework for Processing-In-Memory-Based Neural Network Accelerators 2022 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Qilin Zheng, (unknown), Yijin Guan, Zongwei Wang, Yimao Cai, Yiran Chen, Guangyu Sun, Ru Huang	6
9	Crane: Mitigating Accelerator Under-utilization Caused by Sparsity Irregularities in CNNs 2020 ·IEEE Transactions on Computers ·Yijin Guan, Guangyu Sun, Zhihang Yuan, (unknown), Ningyi Xu, Shu Chen, Jason Cong, Yuan Xie	6
10	FP-DNN: An Automated Framework for Mapping Deep Neural Networks onto FPGAs with RTL-HLS Hybrid Templates 2017 ·Rare & Special e-Zone (The Hong Kong University of Science and Technology) ·Yijin Guan, Hao Liang, Ningyi Xu, Wenqiang Wang, Shaoshuai Shi, Xi Chen, Guangyu Sun, Wěi Zhāng, Jason Cong	210
11	FPGA-based accelerator for long short-term memory recurrent neural networks 2017 ·Yijin Guan, Zhihang Yuan, Guangyu Sun, Jason Cong	131
12	Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks breakdown → 2015 ·Chen Zhang, Peng Li, Guangyu Sun, Yijin Guan, Bingjun Xiao, Jason Cong	1481

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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