Vera Pantelic
- Electrical and Electronic Engineering top 10%
- Automotive Engineering top 5%
- Control and Systems Engineering top 10%
- Computational Theory and Mathematics top 5%
- Computer Networks and Communications top 10%
- Co-authors
- Mark LawfordAlexandre KorobkineBerker BilginMatthias PreindlWeisheng JiangAli EmadiPawel MalyszYinye Yang
- Topics
- Formal Methods in Verification (14 papers)Software Testing and Debugging Techniques (11 papers)Software Reliability and Analysis Research (8 papers)
- Journals
- IEEE Transactions on Automatic ControlIEEE Transactions on Software EngineeringIEEE Transactions on Vehicular Technology
- Partner nations
- CanadaItalyUnited States
In The Last Decade
Vera Pantelic
29 papers receiving 597 citations
Peers
Comparison fields: 5 of 47
- Electrical and Electronic Engineering 356
- Automotive Engineering 253
- Control and Systems Engineering 135
- Computational Theory and Mathematics 85
- Computer Networks and Communications 84
Countries citing papers authored by Vera Pantelic
This map shows the geographic impact of Vera Pantelic's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Vera Pantelic with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Vera Pantelic more than expected).
Fields of papers citing papers by Vera Pantelic
This network shows the impact of papers produced by Vera Pantelic. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Vera Pantelic. The network helps show where Vera Pantelic may publish in the future.
Co-authorship network of co-authors of Vera Pantelic
This figure shows the co-authorship network connecting the top 25 collaborators of Vera Pantelic. A scholar is included among the top collaborators of Vera Pantelic based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Vera Pantelic. Vera Pantelic is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 0 | |
| 2 | 0 | |
| 3 | 3 | |
| 4 | 7 | |
| 5 | 11 | |
| 6 | 106 | |
| 7 | 6 | |
| 8 | 3 | |
| 9 | 1 | |
| 10 | 0 | |
| 11 | 15 | |
| 12 | 1 | |
| 13 | 7 | |
| 14 | 8 | |
| 15 | 360 | |
| 16 | Signature required making simulink data flow and interfaces explicit | 3 |
| 17 | 3 | |
| 18 | 30 | |
| 19 | Towards integrated verification of timed transition models | 1 |
| 20 | 4 |
About Vera Pantelic
Vera Pantelic is a scholar working on Software, Computational Theory and Mathematics and Hardware and Architecture, having authored 32 papers that have together received 615 indexed citations. Recurring topics across this work include Formal Methods in Verification (14 papers), Software Testing and Debugging Techniques (11 papers) and Software Reliability and Analysis Research (8 papers). The work is most often cited by research in Automotive Engineering (253 citations), Software (62 citations) and Hardware and Architecture (74 citations). Vera Pantelic has collaborated with scholars based in Canada, Italy and United States. Frequent co-authors include Mark Lawford, Alexandre Korobkine, Berker Bilgin, Matthias Preindl, Weisheng Jiang, Ali Emadi, Pawel Malysz, Yinye Yang, Pierre Magne and Gehan Selim. Their work appears in journals such as IEEE Transactions on Automatic Control, IEEE Transactions on Software Engineering and IEEE Transactions on Vehicular Technology.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.