T. Gheewala

569 total citations
26 papers, 367 citations indexed

About

T. Gheewala is a scholar working on Electrical and Electronic Engineering, Atomic and Molecular Physics, and Optics and Hardware and Architecture. According to data from OpenAlex, T. Gheewala has authored 26 papers receiving a total of 367 indexed citations (citations by other indexed papers that have themselves been cited), including 23 papers in Electrical and Electronic Engineering, 9 papers in Atomic and Molecular Physics, and Optics and 9 papers in Hardware and Architecture. Recurrent topics in T. Gheewala's work include Advanced Electrical Measurement Techniques (12 papers), VLSI and Analog Circuit Testing (8 papers) and Integrated Circuits and Semiconductor Failure Analysis (7 papers). T. Gheewala is often cited by papers focused on Advanced Electrical Measurement Techniques (12 papers), VLSI and Analog Circuit Testing (8 papers) and Integrated Circuits and Semiconductor Failure Analysis (7 papers). T. Gheewala collaborates with scholars based in United States. T. Gheewala's co-authors include Stuart Bermon, Amar Mukherjee, P. Varma, Robert L. White, H. C. Jones, K. Rajkanan, David F. Heidel and Steven B. Kaplan and has published in prestigious journals such as Applied Physics Letters, Proceedings of the IEEE and IEEE Journal of Solid-State Circuits.

In The Last Decade

T. Gheewala

23 papers receiving 323 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
T. Gheewala United States 11 287 165 122 68 66 26 367
Amol Inamdar United States 14 281 1.0× 200 1.2× 197 1.6× 98 1.4× 23 0.3× 36 412
B. Straughn United States 9 136 0.5× 105 0.6× 182 1.5× 53 0.8× 4 0.1× 14 346
C.J. Anderson United States 11 505 1.8× 104 0.6× 32 0.3× 37 0.5× 78 1.2× 27 551
Emerson S. Fang United States 8 250 0.9× 107 0.6× 103 0.8× 36 0.5× 114 1.7× 15 344
C. Prasad United States 15 494 1.7× 156 0.9× 41 0.3× 31 0.5× 36 0.5× 54 596
Rosario Incandela Switzerland 8 670 2.3× 401 2.4× 40 0.3× 98 1.4× 30 0.5× 11 830
T. Akeyoshi Japan 11 335 1.2× 192 1.2× 51 0.4× 17 0.3× 15 0.2× 36 419
Jong-Phil Hong South Korea 13 353 1.2× 135 0.8× 6 0.0× 94 1.4× 46 0.7× 50 475
S.P. Hui United States 18 869 3.0× 356 2.2× 23 0.2× 68 1.0× 16 0.2× 38 908

Countries citing papers authored by T. Gheewala

Since Specialization
Citations

This map shows the geographic impact of T. Gheewala's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by T. Gheewala with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites T. Gheewala more than expected).

Fields of papers citing papers by T. Gheewala

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by T. Gheewala. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by T. Gheewala. The network helps show where T. Gheewala may publish in the future.

Co-authorship network of co-authors of T. Gheewala

This figure shows the co-authorship network connecting the top 25 collaborators of T. Gheewala. A scholar is included among the top collaborators of T. Gheewala based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with T. Gheewala. T. Gheewala is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Gheewala, T., et al.. (2002). A unifying methodology for intellectual property and custom logic testing. 639–648. 30 indexed citations
2.
Gheewala, T., et al.. (2002). Use of CrossCheck test technology in practical applications. v. 16–21.
3.
Varma, P. & T. Gheewala. (2002). Delay testing using a matrix of accessible storage elements. 580. 243–252. 3 indexed citations
4.
Gheewala, T., et al.. (2002). A global BIST methodology. 154–159. 4 indexed citations
5.
Gheewala, T., et al.. (1994). The economics of scan-path design for testability. Journal of Electronic Testing. 5(2-3). 179–193. 4 indexed citations
6.
Gheewala, T., et al.. (1993). Delay Testing Using a Matrix of Accessible Storage. International Test Conference. 243–252. 1 indexed citations
7.
Gheewala, T., et al.. (1992). Economics of ASIC test development. Ellis Horwood eBooks. 39–51. 1 indexed citations
8.
Gheewala, T., et al.. (1991). ATPG based on a novel grid-addressable latch element. 282–286. 21 indexed citations
9.
Gheewala, T.. (1988). Survey Of High Speed Test Techniques. Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE. 795. 2–2. 1 indexed citations
10.
Gheewala, T.. (1985). Packages for ultra-high speed GaAs ICs. Microelectronics Journal. 16(2). 30–37. 8 indexed citations
11.
Gheewala, T.. (1984). Packages for Ultra-High Speed GaAs ICs. 67–70.
12.
Kaplan, Steven B., T. Gheewala, & Amar Mukherjee. (1983). Inductance-compensated Josephson current-injection device. IEEE Transactions on Magnetics. 19(3). 1238–1241. 1 indexed citations
13.
Gheewala, T. & David F. Heidel. (1982). Self-biasing Josephson logic circuits. IEEE Electron Device Letters. 3(4). 93–96. 1 indexed citations
14.
Gheewala, T., et al.. (1981). A Josephson dc-powered latch. Applied Physics Letters. 38(11). 936–938. 3 indexed citations
15.
Mukherjee, Amar & T. Gheewala. (1981). The punchthrough characteristics of Josephson logic circuits. 122–125. 4 indexed citations
16.
Gheewala, T.. (1980). Design of 2.5-Micrometer Josephson Current Injection Logic (CIL). IBM Journal of Research and Development. 24(2). 130–142. 54 indexed citations
17.
Gheewala, T.. (1980). Josephson-logic devices and circuits. IEEE Transactions on Electron Devices. 27(10). 1857–1869. 34 indexed citations
18.
Gheewala, T.. (1979). Delay measurement of experimental 2.5-μm Josephson current injection logic (CIL). Applied Physics Letters. 34(10). 670–672. 8 indexed citations
19.
Gheewala, T.. (1978). Josephson logic circuits based on nonlinear current injection in interferometer devices. Applied Physics Letters. 33(8). 781–783. 25 indexed citations
20.
Gheewala, T., et al.. (1975). A CMOS implantable multielectrode auditory stimulator for the deaf. IEEE Journal of Solid-State Circuits. 10(6). 472–479. 16 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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