S.J. Piestrak

960 total citations
40 papers, 633 citations indexed

About

S.J. Piestrak is a scholar working on Artificial Intelligence, Information Systems and Electrical and Electronic Engineering. According to data from OpenAlex, S.J. Piestrak has authored 40 papers receiving a total of 633 indexed citations (citations by other indexed papers that have themselves been cited), including 28 papers in Artificial Intelligence, 22 papers in Information Systems and 19 papers in Electrical and Electronic Engineering. Recurrent topics in S.J. Piestrak's work include Coding theory and cryptography (23 papers), Cryptography and Residue Arithmetic (22 papers) and Cryptographic Implementations and Security (16 papers). S.J. Piestrak is often cited by papers focused on Coding theory and cryptography (23 papers), Cryptography and Residue Arithmetic (22 papers) and Cryptographic Implementations and Security (16 papers). S.J. Piestrak collaborates with scholars based in Poland, France and United States. S.J. Piestrak's co-authors include Takashi Nanya, Olivier Sentieys, Sébastien Pillement, N.I. Chervyakov, Mikhail Babenko, Maxim Deryabin, Arutyun Avetisyan, Alankar Shrivastava, Andrei Tchernykh and Aviral Shrivastava and has published in prestigious journals such as IEEE Transactions on Computers, Electronics Letters and IEEE Transactions on Circuits and Systems I Regular Papers.

In The Last Decade

S.J. Piestrak

39 papers receiving 585 citations

Peers

Countries citing papers authored by S.J. Piestrak

Since Specialization

Citations

This map shows the geographic impact of S.J. Piestrak's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by S.J. Piestrak with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites S.J. Piestrak more than expected).

Fields of papers citing papers by S.J. Piestrak

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by S.J. Piestrak. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by S.J. Piestrak. The network helps show where S.J. Piestrak may publish in the future.

Co-authorship network of co-authors of S.J. Piestrak

This figure shows the co-authorship network connecting the top 25 collaborators of S.J. Piestrak. A scholar is included among the top collaborators of S.J. Piestrak based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with S.J. Piestrak. S.J. Piestrak is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Design of reverse converters for the general RNS 3-moduli set {2k, 2n − 1, 2n + 1} 2023 ·EURASIP Journal on Advances in Signal Processing ·(unknown), S.J. Piestrak	0
2	The Study of Monotonic Core Functions and Their Use to Build RNS Number Comparators 2021 ·Electronics ·Mikhail Babenko, S.J. Piestrak, N.I. Chervyakov, Maxim Deryabin	1
3	RNS Number Comparator Based on a Modified Diagonal Function 2020 ·Electronics ·Mikhail Babenko, Maxim Deryabin, S.J. Piestrak, (unknown), N.I. Chervyakov, Andrei Tchernykh, Arutyun Avetisyan	10
4	Hardware/Software Approach to Designing Low-Power RNS-Enhanced Arithmetic Units 2017 ·IEEE Transactions on Circuits and Systems I Regular Papers ·(unknown), S.J. Piestrak	15
5	Design of Reverse Converters for a New Flexible RNS Five-Moduli Set $$\{ 2^k, 2^n-1, 2^n+1, 2^{n+1}-1, 2^{n-1}-1 \}$$ { 2 k , 2 n - 1 , 2 n + 1 , 2 n + 1 - 1 , 2 n - 1 - 1 } (n Even) 2017 ·Circuits Systems and Signal Processing ·(unknown), S.J. Piestrak	6
6	Design of RNS Reverse Converters with Constant Shifting to Residue Datapath Channels 2017 ·Journal of Signal Processing Systems ·(unknown), S.J. Piestrak	6
7	A note on RNS architectures for the implementation of the diagonal function 2014 ·Information Processing Letters ·S.J. Piestrak	13
8	Design of Reverse Converters for General RNS Moduli Sets <formula formulatype="inline"><tex Notation="TeX">$\{ 2^{k}, 2^{n}-1, 2^{n}+1, 2^{n+1}-1 \}$</tex></formula> and <formula formulatype="inline"> <tex Notation="TeX">$\{ 2^{k}, 2^{n}-1, 2^{n}+1, 2^{n-1}-1 \}$</tex></formula> (<formula formulatype="inline"><tex Notation="TeX">$n$</tex></formula> even) 2014 ·IEEE Transactions on Circuits and Systems I Regular Papers ·(unknown), S.J. Piestrak	28
9	Fast and energy-efficient constant-coefficient FIR filters using residue number system 2011 ·SPIRE - Sciences Po Institutional REpository ·(unknown), (unknown), S.J. Piestrak, (unknown), Alankar Shrivastava	3
10	Design of a fault-tolerant coarse-grained 2010 ·(unknown), S.J. Piestrak, Olivier Sentieys, Sébastien Pillement	14
11	Design of residue multipliers-accumulators using periodicity 2008 ·S.J. Piestrak, (unknown)	14
12	Characterizing Laser-Induced Pulses in ICs: Methodology and Results 2006 ·(unknown), S.J. Piestrak, (unknown), (unknown), Stéphane Rossignol, (unknown)	2
13	Feasibility study of designing TSC sequential circuits with 100% fault coverage 2003 ·S.J. Piestrak	7
14	Design of fault-secure encoders for a class of systematic error correcting codes 2002 ·S.J. Piestrak, (unknown), (unknown)	1
15	Design of squarers modulo A with low-level pipelining 2002 ·IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing ·S.J. Piestrak	17
16	The minimal test set for sorting networks and the use of sorting networks in self-testing checkers for unordered codes 2002 ·S.J. Piestrak	11
17	Minimal test set for multi-output threshold circuitsimplemented as bubble sorting networks 2000 ·Electronics Letters ·S.J. Piestrak, (unknown)	1
18	Design of self-testing checkers for Borden codes 1996 ·IEEE Transactions on Computers ·S.J. Piestrak	5
19	Towards Totally Self-C hecking Delay-Insensit ive Systems 1995 ·S.J. Piestrak, (unknown)	2
20	A high-speed realization of a residue to binary number system converter 1995 ·IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing ·S.J. Piestrak	146

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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