Rostislav Dobkin

616 total citations
18 papers, 431 citations indexed

About

Rostislav Dobkin is a scholar working on Electrical and Electronic Engineering, Computer Networks and Communications and Hardware and Architecture. According to data from OpenAlex, Rostislav Dobkin has authored 18 papers receiving a total of 431 indexed citations (citations by other indexed papers that have themselves been cited), including 16 papers in Electrical and Electronic Engineering, 13 papers in Computer Networks and Communications and 6 papers in Hardware and Architecture. Recurrent topics in Rostislav Dobkin's work include Low-power high-performance VLSI design (12 papers), Interconnection Networks and Systems (11 papers) and Advancements in PLL and VCO Technologies (9 papers). Rostislav Dobkin is often cited by papers focused on Low-power high-performance VLSI design (12 papers), Interconnection Networks and Systems (11 papers) and Advancements in PLL and VCO Technologies (9 papers). Rostislav Dobkin collaborates with scholars based in Israel, Greece and United States. Rostislav Dobkin's co-authors include Ran Ginosar, Avinoam Kolodny, Christos Sotiriou, Michael Peleg, Israel Cidon, Arkadiy Morgenshtein, Yevgeny Perelman, Alexander Fish, Adam Teman and Ying Zhang and has published in prestigious journals such as IEEE Transactions on Very Large Scale Integration (VLSI) Systems and Integration.

In The Last Decade

Rostislav Dobkin

18 papers receiving 406 citations

Peers

Countries citing papers authored by Rostislav Dobkin

Since Specialization

Citations

This map shows the geographic impact of Rostislav Dobkin's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Rostislav Dobkin with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Rostislav Dobkin more than expected).

Fields of papers citing papers by Rostislav Dobkin

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Rostislav Dobkin. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Rostislav Dobkin. The network helps show where Rostislav Dobkin may publish in the future.

Co-authorship network of co-authors of Rostislav Dobkin

This figure shows the co-authorship network connecting the top 25 collaborators of Rostislav Dobkin. A scholar is included among the top collaborators of Rostislav Dobkin based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Rostislav Dobkin. Rostislav Dobkin is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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18 of 18 papers shown

#	Work	Indexed citations
1	A 1.4×FO4 self-clocked asynchronous serial link in 0.18 µm for intrachip communication 2017 ·Integration ·Ying Zhang, Rostislav Dobkin, (unknown), (unknown), (unknown), (unknown), Ran Ginosar	2
2	StarSync: An extendable standard-cell mesochronous synchronizer 2013 ·Integration ·(unknown), Rostislav Dobkin, Ran Ginosar, (unknown)	9
3	MTBF Estimation in Coherent Clock Domains 2013 ·(unknown), Ran Ginosar, Rostislav Dobkin, (unknown)	3
4	Near-threshold 40nm Supply Feedback C-element 2011 ·(unknown), Adam Teman, Rostislav Dobkin, Alexander Fish	1
5	An on-chip metastability measurement circuit to characterize synchronization behavior in 65nm 2011 ·(unknown), Ran Ginosar, (unknown), Rostislav Dobkin, Avinoam Kolodny	11
6	The Devolution of Synchronizers 2010 ·(unknown), Ran Ginosar, (unknown), Rostislav Dobkin, Avinoam Kolodny	37
7	The devolution of synchronizers 2010 ·(unknown), Ran Ginosar, (unknown), Rostislav Dobkin, Avinoam Kolodny	16
8	Asynchronous Current Mode Serial Communication 2009 ·IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Rostislav Dobkin, (unknown), Avinoam Kolodny, Ran Ginosar	33
9	Parallel vs. serial on-chip communication 2008 ·Rostislav Dobkin, Arkadiy Morgenshtein, Avinoam Kolodny, Ran Ginosar	25
10	QNoC asynchronous router 2008 ·Integration ·Rostislav Dobkin, Ran Ginosar, Avinoam Kolodny	54
11	Two-phase synchronization with sub-cycle latency 2008 ·Integration ·Rostislav Dobkin, Ran Ginosar	10
12	High Rate Wave-pipelined Asynchronous On-chip Bit-serial Data Link 2007 ·Rostislav Dobkin, Yevgeny Perelman, (unknown), Ran Ginosar, Avinoam Kolodny	24
13	QNoC Asynchronous Router with Dynamic Virtual Channel Allocation 2007 ·Rostislav Dobkin, Ran Ginosar, Israel Cidon	25
14	Fast Asynchronous Shift Register for Bit-Serial Communication 2006 ·Rostislav Dobkin, Ran Ginosar, Avinoam Kolodny	20
15	High Rate Data Synchronization in GALS SoCs 2006 ·IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Rostislav Dobkin, Ran Ginosar, Christos Sotiriou	47
16	Parallel interleaver design and VLSI architecture for low-latency MAP turbo decoders 2005 ·IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Rostislav Dobkin, Michael Peleg, Ran Ginosar	33
17	Data synchronization issues in GALS SoCs 2004 ·Rostislav Dobkin, Ran Ginosar, Christos Sotiriou	59
18	Parallel VLSI architecture for MAP turbo decoder 2003 ·Rostislav Dobkin, Michael Peleg, Ran Ginosar	22

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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