Mitaro Namiki

436 total citations
42 papers, 294 citations indexed

About

Mitaro Namiki is a scholar working on Computer Networks and Communications, Hardware and Architecture and Electrical and Electronic Engineering. According to data from OpenAlex, Mitaro Namiki has authored 42 papers receiving a total of 294 indexed citations (citations by other indexed papers that have themselves been cited), including 27 papers in Computer Networks and Communications, 26 papers in Hardware and Architecture and 13 papers in Electrical and Electronic Engineering. Recurrent topics in Mitaro Namiki's work include Parallel Computing and Optimization Techniques (23 papers), Embedded Systems Design Techniques (17 papers) and Interconnection Networks and Systems (13 papers). Mitaro Namiki is often cited by papers focused on Parallel Computing and Optimization Techniques (23 papers), Embedded Systems Design Techniques (17 papers) and Interconnection Networks and Systems (13 papers). Mitaro Namiki collaborates with scholars based in Japan, New Zealand and Italy. Mitaro Namiki's co-authors include Hideharu Amano, Kimiyoshi Usami, Hiroshi Nakamura, Masaaki Kondo, Tim Bell, Mikiko Sato, Nobuaki Ozaki, Yusuke Koizumi, Tadahiro Kuroda and Hiroki Matsutani and has published in prestigious journals such as IEEE Micro, IEICE Transactions on Electronics and IEICE Transactions on Information and Systems.

In The Last Decade

Mitaro Namiki

35 papers receiving 283 citations

Peers

Countries citing papers authored by Mitaro Namiki

Since Specialization

Citations

This map shows the geographic impact of Mitaro Namiki's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Mitaro Namiki with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Mitaro Namiki more than expected).

Fields of papers citing papers by Mitaro Namiki

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Mitaro Namiki. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Mitaro Namiki. The network helps show where Mitaro Namiki may publish in the future.

Co-authorship network of co-authors of Mitaro Namiki

This figure shows the co-authorship network connecting the top 25 collaborators of Mitaro Namiki. A scholar is included among the top collaborators of Mitaro Namiki based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Mitaro Namiki. Mitaro Namiki is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	M-KUBOS/PYNQ Cluster for multi-access edge computing 2021 ·(unknown), (unknown), (unknown), Kohei Ito, (unknown), Mitaro Namiki, Hideharu Amano	12
2	A Software-based NVM Emulator Supporting Read/Write Asymmetric Latencies 2019 ·IEICE Transactions on Information and Systems ·(unknown), Takahiro Hirofuchi, Ryousei Takano, Mitaro Namiki	4
3	Design and development of bit arrow 2018 ·(unknown), (unknown), (unknown), (unknown), (unknown), Mitaro Namiki	1
4	A shared memory chip for twin-tower of chips 2017 ·IEICE Technical Report; IEICE Tech. Rep. ·(unknown), (unknown), (unknown), (unknown), Naoki Ando, Mitaro Namiki, Hideharu Amano	2
5	Low-power distributed NoSQL database for IoT middleware 2016 ·(unknown), Mikiko Sato, Mitaro Namiki	7
6	First results of performance comparisons on many-core processors in solving QAP with ACO 2014 ·Mikiko Sato, Shigeyoshi Tsutsui, Noriyuki Fujimoto, Yuji Sato, Mitaro Namiki	6
7	Design of Multiple PVAS on InfiniBand Cluster System Consisting of Many-core and Multi-core 2014 ·Mikiko Sato, (unknown), (unknown), Atsushi Hori, Yutaka Ishikawa, Mitaro Namiki	0
8	Design and control methodology for fine grain power gating based on energy characterization and code profiling of microprocessors 2014 ·Kimiyoshi Usami, (unknown), (unknown), (unknown), (unknown), (unknown), Hideharu Amano, Hiroaki Kobayashi, R. Sakamoto, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura	5
9	Multithreaded Two-Phase I/O: Improving Collective MPI-IO Performance on a Lustre File System 2014 ·Yuichi Tsujita, (unknown), Atsushi Hori, Mikiko Sato, Mitaro Namiki, Yutaka Ishikawa	8
10	Unbalanced buffer tree synthesis to suppress ground bounce for fine-grain power gating 2014 ·Kimiyoshi Usami, (unknown), (unknown), (unknown), Hideharu Amano, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura	1
11	A Scalable 3D Heterogeneous Multicore with an Inductive ThruChip Interface 2013 ·IEEE Micro ·Noriyuki Miura, Yusuke Koizumi, (unknown), Hiroki Matsutani, Tadahiro Kuroda, Hideharu Amano, (unknown), Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo, Hiroshi Nakamura	24
12	Dynamic power control with a heterogeneous multi-core system using a 3-D wireless inductive coupling interconnect 2012 ·Yusuke Koizumi, Hideharu Amano, Hiroki Matsutani, Noriyuki Miura, Tadahiro Kuroda, R. Sakamoto, Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo, Hiroshi Nakamura	6
13	SLD-1(Silent Large Datapath): A ultra low power reconfigurable accelerator 2011 ·Nobuaki Ozaki, Kimiyoshi Usami, Hideharu Amano, Mitaro Namiki, Hiroshi Nakamura, Masaaki Kondo	2
14	Proposal of a multi-core processor from the viewpoint of evolutionary computation 2010 ·Mikiko Sato, Yuji Sato, Mitaro Namiki	4
15	Design and Implementation of Fine-Grain Power Gating with Ground Bounce Suppression 2009 ·Kimiyoshi Usami, (unknown), (unknown), (unknown), (unknown), (unknown), (unknown), Hideharu Amano, Mitaro Namiki, (unknown), Masaaki Kondo, Hiroshi Nakamura	22
16	Towards Reconfigurable Cache Memory for a Multithreaded Processor. 2006 ·Parallel and Distributed Processing Techniques and Applications ·(unknown), (unknown), Satoshi Watanabe, Mikiko Sato, (unknown), (unknown), (unknown), Mitaro Namiki, (unknown)	1
17	Implementation of PC Cluster System with Memory Mapped File by Commodity OS. 2006 ·Parallel and Distributed Processing Techniques and Applications ·(unknown), Takuro Mori, (unknown), (unknown), (unknown), Mitaro Namiki	1
18	A New Model of Reconfigurable Cache for an SMT Processor and its FPGA Implementation 2005 ·Parallel and Distributed Processing Techniques and Applications ·(unknown), (unknown), (unknown), Mikiko Sato, (unknown), (unknown), Mitaro Namiki, (unknown)	1
19	Development of a Thread Scheduler for SMT Processor Architecture 2005 ·Parallel and Distributed Processing Techniques and Applications ·(unknown), (unknown), Mikiko Sato, (unknown), (unknown), (unknown), Mitaro Namiki	0
20	Implementation and Evaluation of a Thread Library for Multithreaded Architecture. 2003 ·Parallel and Distributed Processing Techniques and Applications ·(unknown), Mikiko Sato, (unknown), (unknown), (unknown), (unknown), Mitaro Namiki	4

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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