Mark Zwoliński
About
In The Last Decade
Mark Zwoliński
172 papers receiving 1.3k citations
Peers
Comparison fields: 5 of 89
- Electrical and Electronic Engineering 985
- Hardware and Architecture 713
- Artificial Intelligence 294
- Computer Networks and Communications 170
- Computational Theory and Mathematics 149
Countries citing papers authored by Mark Zwoliński
This map shows the geographic impact of Mark Zwoliński's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Mark Zwoliński with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Mark Zwoliński more than expected).
Fields of papers citing papers by Mark Zwoliński
This network shows the impact of papers produced by Mark Zwoliński. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Mark Zwoliński. The network helps show where Mark Zwoliński may publish in the future.
Co-authorship network of co-authors of Mark Zwoliński
This figure shows the co-authorship network connecting the top 25 collaborators of Mark Zwoliński. A scholar is included among the top collaborators of Mark Zwoliński based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Mark Zwoliński. Mark Zwoliński is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 14 | |
| 2 | 6 | |
| 3 | 8 | |
| 4 | 1 | |
| 5 | 5 | |
| 6 | A Masters Course in System on Chip | 1 |
| 7 | Digital System Design with VHDL 2nd Edition | 4 |
| 8 | Concurrent analogue fault simulation, the equation formulation aspect: Research Articles | 1 |
| 9 | A Technique for Transparent Fault Injection and Simulation | 1 |
| 10 | Behavioural/Macro Modelling To Speed-Up Analogue Fault Simulation | 2 |
| 11 | A VHDL Behavioural Synthesis System Featuring Simultaneous Optimisation of Dynamic Power, Area and Delay | 1 |
| 12 | Concurrent Transient Fault Simulation of Nonlinear Analogue Circuits | 2 |
| 13 | Design and Realisation of a New Built-In Current Sensor for Mixed-Signal IDDD Test | 1 |
| 14 | Design for Testability Strategies for a High Performance Automatic Gain Control Circuit | 1 |
| 15 | 11 | |
| 16 | Modelling in VHDL-A, | 1 |
| 17 | Overview of SPICE simulation algorithms | 1 |
| 18 | Reliability of circuit-level simulation, | 2 |
| 19 | A general-purpose network solving system | 2 |
| 20 | Fire effects on vegetation and succession. | 5 |
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.