M. Yamashina
- Electrical and Electronic Engineering top 10%
- Hardware and Architecture top 5%
- Biomedical Engineering
- Signal Processing top 5%
- Computer Vision and Pattern Recognition top 10%
- Co-authors
- H. YamadaToyosaka MoriizumiKazuhiro KudoMasayuki MizunoK. FurutaTadayoshi EnomotoMasato MotomuraH. Abiko
- Topics
- Low-power high-performance VLSI design (24 papers)Analog and Mixed-Signal Circuit Design (22 papers)Advancements in PLL and VCO Technologies (16 papers)
- Journals
- IEEE Journal on Selected Areas in CommunicationsIEEE Journal of Solid-State CircuitsJapanese Journal of Applied Physics
- Partner nations
- Japan
In The Last Decade
M. Yamashina
53 papers receiving 748 citations
Peers
Comparison fields: 5 of 37
- Electrical and Electronic Engineering 602
- Hardware and Architecture 243
- Biomedical Engineering 169
- Signal Processing 165
- Computer Vision and Pattern Recognition 142
Countries citing papers authored by M. Yamashina
This map shows the geographic impact of M. Yamashina's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by M. Yamashina with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites M. Yamashina more than expected).
Fields of papers citing papers by M. Yamashina
This network shows the impact of papers produced by M. Yamashina. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by M. Yamashina. The network helps show where M. Yamashina may publish in the future.
Co-authorship network of co-authors of M. Yamashina
This figure shows the co-authorship network connecting the top 25 collaborators of M. Yamashina. A scholar is included among the top collaborators of M. Yamashina based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with M. Yamashina. M. Yamashina is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 1 | |
| 2 | 1 | |
| 3 | 1 | |
| 4 | 1 | |
| 5 | 1 | |
| 6 | 10 | |
| 7 | 0 | |
| 8 | 2 | |
| 9 | 6 | |
| 10 | 3 | |
| 11 | 8 | |
| 12 | Compact Realization of Phase-Locked Loop Using Digital Control | 1 |
| 13 | A 0.18-µm CMOS Hot-Standby PLL Using a Noise-Immune Adaptive-Gain VCO | 0 |
| 14 | 93 | |
| 15 | A 0.25μm CMOS 0.9V 100MHz DSP Core | 1 |
| 16 | A PLL-Based Programmable Clock Generator with 50-to 350-MHz Oscillating Range for Video Signal Processors | 2 |
| 17 | 35 | |
| 18 | 19 | |
| 19 | An MOS Current Mode Logic (MCML) Circuit for Low-Power Sub-GHz Processors | 94 |
| 20 | 13 |
About M. Yamashina
M. Yamashina is a scholar working on Hardware and Architecture, Signal Processing and Electrical and Electronic Engineering, having authored 59 papers that have together received 819 indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (24 papers), Analog and Mixed-Signal Circuit Design (22 papers) and Advancements in PLL and VCO Technologies (16 papers). The work is most often cited by research in Hardware and Architecture (243 citations), Signal Processing (165 citations) and Electrical and Electronic Engineering (602 citations). M. Yamashina has collaborated with scholars based in Japan. Frequent co-authors include H. Yamada, Toyosaka Moriizumi, Kazuhiro Kudo, Masayuki Mizuno, K. Furuta, Tadayoshi Enomoto, Masato Motomura, H. Abiko, A. Ono and Kohki Okabe. Their work appears in journals such as IEEE Journal on Selected Areas in Communications, IEEE Journal of Solid-State Circuits and Japanese Journal of Applied Physics.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.