Kuang-Chien Chen

635 total citations
28 papers, 412 citations indexed

About

Kuang-Chien Chen is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Computational Theory and Mathematics. According to data from OpenAlex, Kuang-Chien Chen has authored 28 papers receiving a total of 412 indexed citations (citations by other indexed papers that have themselves been cited), including 25 papers in Hardware and Architecture, 23 papers in Electrical and Electronic Engineering and 13 papers in Computational Theory and Mathematics. Recurrent topics in Kuang-Chien Chen's work include VLSI and Analog Circuit Testing (23 papers), Formal Methods in Verification (13 papers) and Radiation Effects in Electronics (12 papers). Kuang-Chien Chen is often cited by papers focused on VLSI and Analog Circuit Testing (23 papers), Formal Methods in Verification (13 papers) and Radiation Effects in Electronics (12 papers). Kuang-Chien Chen collaborates with scholars based in United States, Taiwan and Switzerland. Kuang-Chien Chen's co-authors include Kwang‐Ting Cheng, Shi‐Yu Huang, Chih-Chang Lin, Malgorzata Marek-Sadowska, Saburo Muroga, Shih-Chieh Chang, Chung-Yang Huang, Forrest Brewer, Mike Tien-Chien Lee and Tong Gao and has published in prestigious journals such as IEEE Transactions on Computers, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and Computers & Graphics.

In The Last Decade

Kuang-Chien Chen

28 papers receiving 383 citations

Peers

Countries citing papers authored by Kuang-Chien Chen

Since Specialization

Citations

This map shows the geographic impact of Kuang-Chien Chen's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Kuang-Chien Chen with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Kuang-Chien Chen more than expected).

Fields of papers citing papers by Kuang-Chien Chen

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Kuang-Chien Chen. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Kuang-Chien Chen. The network helps show where Kuang-Chien Chen may publish in the future.

Co-authorship network of co-authors of Kuang-Chien Chen

This figure shows the co-authorship network connecting the top 25 collaborators of Kuang-Chien Chen. A scholar is included among the top collaborators of Kuang-Chien Chen based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Kuang-Chien Chen. Kuang-Chien Chen is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Error correction based on verification techniques 2005 ·Rare & Special e-Zone (The Hong Kong University of Science and Technology) ·Shi‐Yu Huang, Kuang-Chien Chen, Kwang‐Ting Cheng	4
2	Input assignment algorithm for decoded-PLAs with multi-input decoders 2003 ·Kuang-Chien Chen, Saburo Muroga	4
3	AQUILA: An equivalence verifier for large sequential circuits 2002 ·Rare & Special e-Zone (The Hong Kong University of Science and Technology) ·Shi‐Yu Huang, Kwang‐Ting Cheng, Kuang-Chien Chen	11
4	Incremental logic rectification 2002 ·Shi‐Yu Huang, Kuang-Chien Chen, Kwang‐Ting Cheng	1
5	An ATPG-based framework for verifying sequential equivalence 2002 ·Rare & Special e-Zone (The Hong Kong University of Science and Technology) ·Shi‐Yu Huang, Kwang‐Ting Cheng, Kuang-Chien Chen, (unknown)	10
6	Placement and placement driven technology mapping for FPGA synthesis 2002 ·(unknown), Kuang-Chien Chen, J. Cong, Yuzheng Ding, (unknown)	2
7	ErrorTracer: a fault simulation-based approach to design error diagnosis 2002 ·Rare & Special e-Zone (The Hong Kong University of Science and Technology) ·Shi‐Yu Huang, Kwang‐Ting Cheng, Kuang-Chien Chen, (unknown)	30
8	AQUILA: an equivalence checking system for large sequential designs 2000 ·IEEE Transactions on Computers ·(unknown), Kwang‐Ting Cheng, Kuang-Chien Chen, Chung-Yang Huang, Forrest Brewer	27
9	Logic synthesis for engineering change 1999 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Chih-Chang Lin, Kuang-Chien Chen, Malgorzata Marek-Sadowska	32
10	AutoFix: a hybrid tool for automatic logic rectification 1999 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Shi‐Yu Huang, Kuang-Chien Chen, Kwang‐Ting Cheng	24
11	Cost-free scan: a low-overhead scan path design 1998 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Chih-Chang Lin, Malgorzata Marek-Sadowska, (unknown), Kuang-Chien Chen	7
12	Error Tracer: A Fault-Simualtion-Based Approach to Design Error Diagnosis 1997 ·International Test Conference ·Shi‐Yu Huang, Kwang‐Ting Cheng, Kuang-Chien Chen, (unknown)	12
13	Sequential permissible functions and their application to circuit optimization 1996 ·Chih-Chang Lin, Kuang-Chien Chen, Malgorzata Marek-Sadowska, (unknown)	2
14	Error correction based on verification techniques 1996 ·Rare & Special e-Zone (The Hong Kong University of Science and Technology) ·Shi‐Yu Huang, Kuang-Chien Chen, Kwang‐Ting Cheng	17
15	Compact vector generation for accurate power simulation 1996 ·Rare & Special e-Zone (The Hong Kong University of Science and Technology) ·Shi‐Yu Huang, Kuang-Chien Chen, Kwang‐Ting Cheng, (unknown)	16
16	Cost-free scan: a low-overhead scan path design methodology 1995 ·International Conference on Computer Aided Design ·Chih-Chang Lin, Mike Tien-Chien Lee, Malgorzata Marek-Sadowska, Kuang-Chien Chen	16
17	Logic rectification and synthesis for engineering change 1995 ·Chih-Chang Lin, (unknown), Malgorzata Marek-Sadowska, Kuang-Chien Chen	4
18	LUT-based FPGA technology mapping under arbitrary net-delay models 1994 ·Computers & Graphics ·Jason Cong, Yuzheng Ding, Tong Gao, Kuang-Chien Chen	12
19	A resynthesis approach for network optimization 1991 ·Kuang-Chien Chen, Yusuke Matsunaga, Saburo Muroga, Masahiro Fujita	8
20	Timing optimization for multi-level combinational networks 1990 ·Kuang-Chien Chen, Saburo Muroga	29

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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