Kenji Kise

729 total citations
70 papers, 385 citations indexed

About

Kenji Kise is a scholar working on Hardware and Architecture, Computer Networks and Communications and Electrical and Electronic Engineering. According to data from OpenAlex, Kenji Kise has authored 70 papers receiving a total of 385 indexed citations (citations by other indexed papers that have themselves been cited), including 62 papers in Hardware and Architecture, 52 papers in Computer Networks and Communications and 16 papers in Electrical and Electronic Engineering. Recurrent topics in Kenji Kise's work include Parallel Computing and Optimization Techniques (58 papers), Interconnection Networks and Systems (39 papers) and Embedded Systems Design Techniques (33 papers). Kenji Kise is often cited by papers focused on Parallel Computing and Optimization Techniques (58 papers), Interconnection Networks and Systems (39 papers) and Embedded Systems Design Techniques (33 papers). Kenji Kise collaborates with scholars based in Japan and Egypt. Kenji Kise's co-authors include Takahiro Katagiri, Hiroki Honda, Toshitsugu Yuba, Shimpei Sato, Ryohei Kobayashi, Makoto Saitoh, Shinya Takamaeda-Yamazaki, Tomohiro Yoneda, Elsayed A. Elsayed and Md. Ashraful Islam and has published in prestigious journals such as IEEE Access, Parallel Computing and IEICE Transactions on Information and Systems.

In The Last Decade

Kenji Kise

63 papers receiving 378 citations

Peers

Kenji Kise
Davide Zoni Italy
Shlomo Weiss Israel
Tomas Rokicki United States
Christopher Celio United States
Samy Meftali France
Shin-haeng Kang South Korea
Berkin Özıṣıkyılmaz United States
W. Böhm United States
Hanchen Jin United States
Licheng Guo United States
Davide Zoni Italy
Kenji Kise
Citations per year, relative to Kenji Kise Kenji Kise (= 1×) peers Davide Zoni

Countries citing papers authored by Kenji Kise

Since Specialization
Citations

This map shows the geographic impact of Kenji Kise's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Kenji Kise with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Kenji Kise more than expected).

Fields of papers citing papers by Kenji Kise

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Kenji Kise. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Kenji Kise. The network helps show where Kenji Kise may publish in the future.

Co-authorship network of co-authors of Kenji Kise

This figure shows the co-authorship network connecting the top 25 collaborators of Kenji Kise. A scholar is included among the top collaborators of Kenji Kise based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Kenji Kise. Kenji Kise is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Kise, Kenji, et al.. (2021). Efficient Resource Shared RISC-V Multicore Processor. 366–372. 2 indexed citations
2.
Islam, Md. Ashraful, et al.. (2019). An Efficient Implementation of a TAGE Branch Predictor for Soft Processors on FPGA. 8. 108–115. 3 indexed citations
3.
Sato, Shimpei, et al.. (2017). Fast and Cycle-Accurate Emulation of Large-Scale Networks-on-Chip Using a Single FPGA. ACM Transactions on Reconfigurable Technology and Systems. 10(4). 1–27. 9 indexed citations
4.
Kise, Kenji, et al.. (2017). Enhanced Long Edge First Routing Algorithm and Evaluation in Large-Scale Networks-on-Chip. 83–90. 1 indexed citations
5.
Kise, Kenji, et al.. (2017). High-Performance Hardware Merge Sorter. Tokyo Tech Research Repository (Tokyo Institute of Technology). 1–8. 41 indexed citations
6.
Sato, Shimpei, et al.. (2015). Ultra-fast NoC emulation on a single FPGA. 1–8. 17 indexed citations
7.
Sato, Shimpei, et al.. (2014). Challenge for Ultrafast 10K-Node NoC emulation on FPGA. IEICE Technical Report; IEICE Tech. Rep.. 114(223). 23–28.
8.
Kise, Kenji, et al.. (2013). ArchHDL: A New Hardware Description Language for High-Speed Architectural Evaluation. 2004. 107–112. 7 indexed citations
9.
Kise, Kenji, et al.. (2013). LEF. 5–10. 5 indexed citations
10.
Kise, Kenji, et al.. (2013). Application Aware DRAM Bank Partitioning in CMP. 349–356. 2 indexed citations
11.
Kise, Kenji, et al.. (2012). CoreSymphony architecture. 249–252.
12.
Takamaeda-Yamazaki, Shinya, et al.. (2011). An FPGA-based scalable simulation accelerator for tile architectures. ACM SIGARCH Computer Architecture News. 39(4). 38–43. 3 indexed citations
13.
Kise, Kenji, et al.. (2009). The Cache-Core Architecture to Enhance the Memory Performance on Multi-Core Processors. 18. 445–450. 2 indexed citations
14.
Kise, Kenji, et al.. (2009). MipsCoreDuo: A multifunction dual-core processor. 587–590. 1 indexed citations
15.
Kise, Kenji, Takahiro Katagiri, Hiroki Honda, & Toshitsugu Yuba. (2006). The Bimode++ Branch Predictor. 19–26. 5 indexed citations
16.
Kise, Kenji, Takahiro Katagiri, Hiroki Honda, & Toshitsugu Yuba. (2005). A Method to Reduce the Acknowledgement Overhead of S-DSM Systems. 12(12). 4391–7.
17.
Katagiri, Takahiro, et al.. (2005). A time-to-live based reservation algorithm on fully decentralized resource discovery in Grid computing. Parallel Computing. 31(6). 529–543. 29 indexed citations
18.
Kise, Kenji, Takahiro Katagiri, Hiroki Honda, & Toshitsugu Yuba. (2005). A Super Instruction-Flow Architecture for High Performance and Low Power Processors. 10–19. 1 indexed citations
19.
Kise, Kenji, Takahiro Katagiri, Hiroki Honda, & Toshitsugu Yuba. (2004). The SimCore/Alpha Functional Simulator. 24–es. 5 indexed citations
20.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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2026