Ka-Fai Un

481 total citations
37 papers, 303 citations indexed

About

Ka-Fai Un is a scholar working on Electrical and Electronic Engineering, Signal Processing and Artificial Intelligence. According to data from OpenAlex, Ka-Fai Un has authored 37 papers receiving a total of 303 indexed citations (citations by other indexed papers that have themselves been cited), including 23 papers in Electrical and Electronic Engineering, 9 papers in Signal Processing and 9 papers in Artificial Intelligence. Recurrent topics in Ka-Fai Un's work include Radio Frequency Integrated Circuit Design (11 papers), Speech and Audio Processing (9 papers) and Music and Audio Processing (8 papers). Ka-Fai Un is often cited by papers focused on Radio Frequency Integrated Circuit Design (11 papers), Speech and Audio Processing (9 papers) and Music and Audio Processing (8 papers). Ka-Fai Un collaborates with scholars based in Macao, China and Portugal. Ka-Fai Un's co-authors include Rui P. Martins, Pui‐In Mak, Wei-Han Yu, Lei Xuan, Chi‐Seng Lam, Roberto Gómez‐García, Zhi Yang, Ying Chen, Changzhi Li and José‐María Muñoz‐Ferreras and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Microwave Theory and Techniques and IEEE Transactions on Circuits and Systems I Regular Papers.

In The Last Decade

Ka-Fai Un

33 papers receiving 295 citations

Peers

Countries citing papers authored by Ka-Fai Un

Since Specialization

Citations

This map shows the geographic impact of Ka-Fai Un's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Ka-Fai Un with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Ka-Fai Un more than expected).

Fields of papers citing papers by Ka-Fai Un

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Ka-Fai Un. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Ka-Fai Un. The network helps show where Ka-Fai Un may publish in the future.

Co-authorship network of co-authors of Ka-Fai Un

This figure shows the co-authorship network connecting the top 25 collaborators of Ka-Fai Un. A scholar is included among the top collaborators of Ka-Fai Un based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Ka-Fai Un. Ka-Fai Un is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	An 800-MHz 8.17-TOPS/W 0.63-TOPS/mm ² Memory-Utilization-Aware CNN Accelerator Featuring a Memory Stationary Dataflow 2025 ·IEEE Journal of Solid-State Circuits ·(unknown), Ke Li, Ka-Fai Un, Wei-Han Yu, Rui P. Martins, Pui‐In Mak	0
2	GSLP-CIM: A 28-nm Globally Systolic and Locally Parallel CNN/Transformer Accelerator With Scalable and Reconfigurable eDRAM Compute-in-Memory Macro for Flexible Dataflow 2024 ·IEEE Transactions on Circuits and Systems I Regular Papers ·Yi Zhan, Wei-Han Yu, Ka-Fai Un, Rui P. Martins, Pui‐In Mak	2
3	CLUT-CIM: A Capacitance Lookup Table-Based Analog Compute-in-Memory Macro With Signed-Channel Training and Weight Updating for Nonuniform Quantization 2024 ·IEEE Transactions on Circuits and Systems I Regular Papers ·(unknown), (unknown), Wei-Han Yu, Ka-Fai Un, Chi‐Hang Chan, (unknown), Rui P. Martins, Pui‐In Mak	2
4	An FPGA-Based Transformer Accelerator With Parallel Unstructured Sparsity Handling for Question-Answering Applications 2024 ·IEEE Transactions on Circuits & Systems II Express Briefs ·(unknown), (unknown), Ka-Fai Un, Wei-Han Yu, Rui P. Martins, Pui‐In Mak	1
5	A 119.64 GOPs/W FPGA-Based ResNet50 Mixed-Precision Accelerator Using the Dynamic DSP Packing 2024 ·IEEE Transactions on Circuits & Systems II Express Briefs ·(unknown), Wei-Han Yu, Ka-Fai Un, Chi‐Hang Chan, (unknown)	4
6	FLEX-CIM: A Flexible Kernel Size 1-GHz 181.6-TOPS/W 25.63-TOPS/mm² Analog Compute-in-Memory Macro 2024 ·IEEE Journal of Solid-State Circuits ·(unknown), Wei-Han Yu, Ka-Fai Un, Chi‐Hang Chan, (unknown), (unknown), Rui P. Martins, Pui‐In Mak	4
7	A 90.7-nW Vibration-Based Condition Monitoring Chip Featuring a Digital Compute-in-Memory- Based DNN Accelerator Using an Ultra-Low-Power 13T-SRAM Cell 2024 ·IEEE Journal of Solid-State Circuits ·(unknown), Wei-Han Yu, (unknown), Ka-Fai Un, Jun Yin, Rui P. Martins, Pui‐In Mak	0
8	A 28-nm 18.7 TOPS/mm² 89.4-to-234.6 TOPS/W 8b Single-Finger eDRAM Compute-in-Memory Macro With Bit-Wise Sparsity Aware and Kernel-Wise Weight Update/Refresh 2024 ·IEEE Journal of Solid-State Circuits ·Yi Zhan, Wei-Han Yu, Ka-Fai Un, Rui P. Martins, Pui‐In Mak	5
9	A 1.8% FAR, 2 ms Decision Latency, 1.73 nJ/Decision Keywords-Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-IF-Domain Computing and Scalable 5T-SRAM 2024 ·IEEE Journal of Solid-State Circuits ·(unknown), Wei-Han Yu, (unknown), Ka-Fai Un, Rui P. Martins, Pui‐In Mak	3
10	A 97.8 GOPS/W FPGA-Based Residual-Block-Aware CNN Accelerator Featuring Multi-Clock PW ² Pipeline and Adaptive-Resolution Quantization 2024 ·IEEE Transactions on Circuits and Systems I Regular Papers ·(unknown), Ke Li, Ka-Fai Un, Wei-Han Yu, Rui P. Martins, Pui‐In Mak	1
11	A 47-nW Voice Activity Detector (VAD) Featuring a Short-Time CNN Feature Extractor and an RNN-Based Classifier With a Non-Volatile CAP-ROM 2023 ·IEEE Journal of Solid-State Circuits ·(unknown), Ka-Fai Un, Wei-Han Yu, Rui P. Martins, Pui‐In Mak	5
12	A 0.05-mm² 2.91-nJ/Decision Keyword-Spotting (KWS) Chip Featuring an Always-Retention 5T-SRAM in 28-nm CMOS 2023 ·IEEE Journal of Solid-State Circuits ·(unknown), Wei-Han Yu, Ka-Fai Un, Rui P. Martins, Pui‐In Mak	9
13	An FPGA-Based Energy-Efficient Reconfigurable Depthwise Separable Convolution Accelerator for Image Recognition 2022 ·IEEE Transactions on Circuits & Systems II Express Briefs ·Lei Xuan, Ka-Fai Un, Chi‐Seng Lam, Rui P. Martins	27
14	An FPGA-Based Transformer Accelerator Using Output Block Stationary Dataflow for Object Recognition Applications 2022 ·IEEE Transactions on Circuits & Systems II Express Briefs ·(unknown), (unknown), Ka-Fai Un, Wei-Han Yu, Pui‐In Mak, Rui P. Martins	22
15	A 108-nW 0.8-mm² Analog Voice Activity Detector Featuring a Time-Domain CNN With Sparsity-Aware Computation and Sparsified Quantization in 28-nm CMOS 2022 ·IEEE Journal of Solid-State Circuits ·(unknown), Ka-Fai Un, Wei-Han Yu, Pui‐In Mak, Rui P. Martins	7
16	An FPGA-Based Energy-Efficient Reconfigurable Convolutional Neural Network Accelerator for Object Recognition Applications 2021 ·IEEE Transactions on Circuits & Systems II Express Briefs ·(unknown), Ka-Fai Un, Wei-Han Yu, Pui‐In Mak, Rui P. Martins	50
17	Revisiting the Frontiers of Analog and Mixed-Signal Integrated Circuits Architectures and Techniques towards the future Internet of Everything (IoE) Applications 2021 ·Rui P. Martins, Pui‐In Mak, Sai‐Weng Sin, Man‐Kay Law, Yan Zhu, Yan Lü, Jun Yin, Chi‐Hang Chan, Yong Chen, Ka-Fai Un, Mo Huang, Minglei Zhang, (unknown), Wei-Han Yu	6
18	A 0.12-mm² 1.2-to-2.4-mW 1.3-to-2.65-GHz Fractional-N Bang-Bang Digital PLL With 8-$\mu$ s Settling Time for Multi-ISM-Band ULP Radios 2019 ·IEEE Transactions on Circuits and Systems I Regular Papers ·Ka-Fai Un, (unknown), Jun Yin, (unknown), (unknown), (unknown), Pui‐In Mak, Rui P. Martins	10
19	Design Considerations of the Interpolative Digital Transmitter for Quantization Noise and Replicas Rejection 2019 ·IEEE Transactions on Circuits & Systems II Express Briefs ·Ka-Fai Un, (unknown), Pui‐In Mak, Rui P. Martins, Anding Zhu, Robert Bogdan Staszewski	4
20	A 0.7–2.5 GHz, 61% EIRP System Efficiency, Four-Element MIMO TX System Exploiting Integrated Power-Relaxed Power Amplifiers and an Analog Spatial De-Interleaver 2017 ·IEEE Transactions on Circuits and Systems I Regular Papers ·Wei-Han Yu, Ka-Fai Un, Pui‐In Mak, Rui P. Martins	2

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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