Wei-Han Yu

623 total citations
44 papers, 420 citations indexed

About

Wei-Han Yu is a scholar working on Electrical and Electronic Engineering, Signal Processing and Artificial Intelligence. According to data from OpenAlex, Wei-Han Yu has authored 44 papers receiving a total of 420 indexed citations (citations by other indexed papers that have themselves been cited), including 32 papers in Electrical and Electronic Engineering, 9 papers in Signal Processing and 9 papers in Artificial Intelligence. Recurrent topics in Wei-Han Yu's work include Radio Frequency Integrated Circuit Design (14 papers), Speech and Audio Processing (9 papers) and Advanced Power Amplifier Design (9 papers). Wei-Han Yu is often cited by papers focused on Radio Frequency Integrated Circuit Design (14 papers), Speech and Audio Processing (9 papers) and Advanced Power Amplifier Design (9 papers). Wei-Han Yu collaborates with scholars based in Macao, Portugal and China. Wei-Han Yu's co-authors include Pui‐In Mak, Rui P. Martins, Jun Yin, Ka-Fai Un, Chao Fan, Boris Murmann, Chi‐Hang Chan, Feifei Chen, Youngcheol Chae and M.T. Hays and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Microwave Theory and Techniques and Electronics Letters.

In The Last Decade

Wei-Han Yu

41 papers receiving 414 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
Wei-Han Yu Macao	10	334	84	49	39	33	44	420
Wei Mao China	12	273 0.8×	186 2.2×	36 0.7×	58 1.5×	47 1.4×	56	476
Sayed Masoud Sayedi Iran	9	226 0.7×	138 1.6×	56 1.1×	51 1.3×	22 0.7×	44	337
Jordan Gray United States	10	304 0.9×	216 2.6×	41 0.8×	31 0.8×	51 1.5×	22	419
Luiz Carlos Gouveia United Kingdom	8	167 0.5×	96 1.1×	32 0.7×	57 1.5×	17 0.5×	18	315
Jun Rim Choi South Korea	11	220 0.7×	85 1.0×	95 1.9×	81 2.1×	39 1.2×	58	388
Xiaoyang Zeng China	11	300 0.9×	97 1.2×	41 0.8×	30 0.8×	67 2.0×	71	394
Laurent Fesquet France	10	216 0.6×	103 1.2×	34 0.7×	42 1.1×	94 2.8×	60	365
Craig Schlottmann United States	11	329 1.0×	209 2.5×	70 1.4×	19 0.5×	82 2.5×	15	394
Brian Degnan United States	10	376 1.1×	94 1.1×	80 1.6×	15 0.4×	35 1.1×	28	420
Muhammad Akmal Chaudhary United Arab Emirates	14	388 1.2×	36 0.4×	72 1.5×	13 0.3×	30 0.9×	90	551

Countries citing papers authored by Wei-Han Yu

Since Specialization

Citations

This map shows the geographic impact of Wei-Han Yu's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Wei-Han Yu with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Wei-Han Yu more than expected).

Fields of papers citing papers by Wei-Han Yu

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Wei-Han Yu. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Wei-Han Yu. The network helps show where Wei-Han Yu may publish in the future.

Co-authorship network of co-authors of Wei-Han Yu

This figure shows the co-authorship network connecting the top 25 collaborators of Wei-Han Yu. A scholar is included among the top collaborators of Wei-Han Yu based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Wei-Han Yu. Wei-Han Yu is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

Sort: Min cites: Since: Top N: Style:

20 of 20 papers shown

Li, Ke, et al.. (2025). An 800-MHz 8.17-TOPS/W 0.63-TOPS/mm ² Memory-Utilization-Aware CNN Accelerator Featuring a Memory Stationary Dataflow. IEEE Journal of Solid-State Circuits. 60(8). 3033–3042.

Zhan, Yi, Wei-Han Yu, Ka-Fai Un, Rui P. Martins, & Pui‐In Mak. (2024). GSLP-CIM: A 28-nm Globally Systolic and Locally Parallel CNN/Transformer Accelerator With Scalable and Reconfigurable eDRAM Compute-in-Memory Macro for Flexible Dataflow. IEEE Transactions on Circuits and Systems I Regular Papers. 72(4). 1657–1667. 2 indexed citations

Yu, Wei-Han, et al.. (2024). A Battery-Free Crystal-Less BLE Transmitter Tag With Fully-Integrated RF Harvesting and Multitag TDD and FDD Broadcasting. IEEE Transactions on Microwave Theory and Techniques. 73(3). 1837–1847. 1 indexed citations

Yu, Wei-Han, et al.. (2024). CLUT-CIM: A Capacitance Lookup Table-Based Analog Compute-in-Memory Macro With Signed-Channel Training and Weight Updating for Nonuniform Quantization. IEEE Transactions on Circuits and Systems I Regular Papers. 71(11). 4996–5004. 2 indexed citations

Yin, Jun, et al.. (2024). A ULP Long-Range Active-RF Tag With Automatically Calibrated Antenna-TRX Interface. IEEE Journal of Solid-State Circuits. 59(11). 3670–3682. 1 indexed citations

Un, Ka-Fai, et al.. (2024). An FPGA-Based Transformer Accelerator With Parallel Unstructured Sparsity Handling for Question-Answering Applications. IEEE Transactions on Circuits & Systems II Express Briefs. 71(11). 4688–4692. 1 indexed citations

Yu, Wei-Han, et al.. (2024). A 119.64 GOPs/W FPGA-Based ResNet50 Mixed-Precision Accelerator Using the Dynamic DSP Packing. IEEE Transactions on Circuits & Systems II Express Briefs. 71(5). 2554–2558. 4 indexed citations

Yu, Wei-Han, et al.. (2024). FLEX-CIM: A Flexible Kernel Size 1-GHz 181.6-TOPS/W 25.63-TOPS/mm² Analog Compute-in-Memory Macro. IEEE Journal of Solid-State Circuits. 59(9). 3021–3031. 4 indexed citations

Yu, Wei-Han, et al.. (2024). A 90.7-nW Vibration-Based Condition Monitoring Chip Featuring a Digital Compute-in-Memory- Based DNN Accelerator Using an Ultra-Low-Power 13T-SRAM Cell. IEEE Journal of Solid-State Circuits. 60(1). 321–331.

10.

Zhan, Yi, Wei-Han Yu, Ka-Fai Un, Rui P. Martins, & Pui‐In Mak. (2024). A 28-nm 18.7 TOPS/mm² 89.4-to-234.6 TOPS/W 8b Single-Finger eDRAM Compute-in-Memory Macro With Bit-Wise Sparsity Aware and Kernel-Wise Weight Update/Refresh. IEEE Journal of Solid-State Circuits. 59(11). 3866–3876. 5 indexed citations

11.

Yu, Wei-Han, et al.. (2024). A 1.8% FAR, 2 ms Decision Latency, 1.73 nJ/Decision Keywords-Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-IF-Domain Computing and Scalable 5T-SRAM. IEEE Journal of Solid-State Circuits. 60(3). 1103–1112. 3 indexed citations

12.

Un, Ka-Fai, et al.. (2023). A 47-nW Voice Activity Detector (VAD) Featuring a Short-Time CNN Feature Extractor and an RNN-Based Classifier With a Non-Volatile CAP-ROM. IEEE Journal of Solid-State Circuits. 58(11). 3020–3029. 5 indexed citations

13.

Hays, M.T., Wei-Han Yu, Changuk Lee, et al.. (2023). A 1024-Channel 268-nW/Pixel 36×36 μm²/Channel Data-Compressive Neural Recording IC for High-Bandwidth Brain–Computer Interfaces. IEEE Journal of Solid-State Circuits. 59(4). 1123–1136. 7 indexed citations

14.

Un, Ka-Fai, et al.. (2022). An FPGA-Based Transformer Accelerator Using Output Block Stationary Dataflow for Object Recognition Applications. IEEE Transactions on Circuits & Systems II Express Briefs. 70(1). 281–285. 22 indexed citations

15.

Un, Ka-Fai, et al.. (2022). A 108-nW 0.8-mm² Analog Voice Activity Detector Featuring a Time-Domain CNN With Sparsity-Aware Computation and Sparsified Quantization in 28-nm CMOS. IEEE Journal of Solid-State Circuits. 57(11). 3288–3297. 7 indexed citations

16.

Un, Ka-Fai, et al.. (2021). An FPGA-Based Energy-Efficient Reconfigurable Convolutional Neural Network Accelerator for Object Recognition Applications. IEEE Transactions on Circuits & Systems II Express Briefs. 68(9). 3143–3147. 50 indexed citations

17.

Fan, Chao, Wei-Han Yu, Pui‐In Mak, & Rui P. Martins. (2019). A 40-Gb/s PAM-4 Transmitter Using a 0.16-pJ/bit SST-CML-Hybrid (SCH) Output Driver and a Hybrid-Path 3-Tap FFE Scheme in 28-nm CMOS. IEEE Transactions on Circuits and Systems I Regular Papers. 66(12). 4850–4861. 11 indexed citations

18.

Yin, Jun, et al.. (2019). A 0.2-V Energy-Harvesting BLE Transmitter With a Micropower Manager Achieving 25% System Efficiency at 0-dBm Output and 5.2-nW Sleep Power in 28-nm CMOS. IEEE Journal of Solid-State Circuits. 54(5). 1351–1362. 61 indexed citations

19.

Yu, Wei-Han, et al.. (2018). A 0.18-V 382-<inline-formula> <tex-math notation="LaTeX">$\mu$ </tex-math> </inline-formula>W Bluetooth Low-Energy Receiver Front-End With 1.33-nW Sleep Power for Energy-Harvesting Applications in 28-nm CMOS. IEEE Journal of Solid-State Circuits. 53(6). 1618–1627. 55 indexed citations

20.

Yu, Wei-Han, Ka-Fai Un, Pui‐In Mak, & Rui P. Martins. (2017). A 0.7–2.5 GHz, 61% EIRP System Efficiency, Four-Element MIMO TX System Exploiting Integrated Power-Relaxed Power Amplifiers and an Analog Spatial De-Interleaver. IEEE Transactions on Circuits and Systems I Regular Papers. 65(1). 14–25. 2 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact