Jessy Clédière

823 total citations
20 papers, 316 citations indexed

About

Jessy Clédière is a scholar working on Hardware and Architecture, Artificial Intelligence and Electrical and Electronic Engineering. According to data from OpenAlex, Jessy Clédière has authored 20 papers receiving a total of 316 indexed citations (citations by other indexed papers that have themselves been cited), including 15 papers in Hardware and Architecture, 15 papers in Artificial Intelligence and 7 papers in Electrical and Electronic Engineering. Recurrent topics in Jessy Clédière's work include Physical Unclonable Functions (PUFs) and Hardware Security (15 papers), Cryptographic Implementations and Security (14 papers) and Security and Verification in Computing (7 papers). Jessy Clédière is often cited by papers focused on Physical Unclonable Functions (PUFs) and Hardware Security (15 papers), Cryptographic Implementations and Security (14 papers) and Security and Verification in Computing (7 papers). Jessy Clédière collaborates with scholars based in France and Luxembourg. Jessy Clédière's co-authors include Thanh‐Ha Le, Jean-Max Dutertre, Assia Tria, Christine Servière, Jean‐Louis Lacoume, Frédéric Valette, Bruno Robisson, Marc Renaudin, R. Leveugle and Paolo Maistri and has published in prestigious journals such as IEEE Transactions on Information Forensics and Security, Journal of Cryptology and Journal of Electronic Testing.

In The Last Decade

Jessy Clédière

19 papers receiving 304 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Jessy Clédière France 11 248 234 102 89 51 20 316
Davide Bellizia Italy 14 229 0.9× 309 1.3× 151 1.5× 174 2.0× 37 0.7× 34 435
Bilgiday Yuce United States 11 229 0.9× 191 0.8× 46 0.5× 83 0.9× 79 1.5× 21 286
Jean-Baptiste Rigaud France 11 216 0.9× 250 1.1× 77 0.8× 117 1.3× 42 0.8× 27 308
Falk Schellenberg Germany 10 260 1.0× 266 1.1× 26 0.3× 128 1.4× 92 1.8× 19 339
Hannes Groß Austria 10 288 1.2× 216 0.9× 137 1.3× 39 0.4× 66 1.3× 13 327
George Provelengios United States 10 186 0.8× 189 0.8× 56 0.5× 98 1.1× 50 1.0× 15 261
Subhadeep Banik Switzerland 11 307 1.2× 72 0.3× 218 2.1× 45 0.5× 39 0.8× 48 367
Rei Ueno Japan 9 206 0.8× 122 0.5× 96 0.9× 62 0.7× 39 0.8× 49 277
Ilias Giechaskiel United States 11 204 0.8× 213 0.9× 42 0.4× 118 1.3× 50 1.0× 17 294
Cécile Dumas France 7 291 1.2× 186 0.8× 109 1.1× 38 0.4× 125 2.5× 7 318

Countries citing papers authored by Jessy Clédière

Since Specialization
Citations

This map shows the geographic impact of Jessy Clédière's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Jessy Clédière with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Jessy Clédière more than expected).

Fields of papers citing papers by Jessy Clédière

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Jessy Clédière. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Jessy Clédière. The network helps show where Jessy Clédière may publish in the future.

Co-authorship network of co-authors of Jessy Clédière

This figure shows the co-authorship network connecting the top 25 collaborators of Jessy Clédière. A scholar is included among the top collaborators of Jessy Clédière based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Jessy Clédière. Jessy Clédière is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Maingault, L., et al.. (2023). X ray nanoprobe for fault attacks and circuit edits on 28-nm integrated circuits. HAL (Le Centre pour la Communication Scientifique Directe). 1–6. 1 indexed citations
2.
Clédière, Jessy, et al.. (2023). Exploration of System-on-Chip Secure-Boot Vulnerability to Fault-Injection by Side-Channel Analysis. SPIRE - Sciences Po Institutional REpository. 1–6.
3.
Borel, S., Jean Charbonnier, Jessy Clédière, et al.. (2018). A Novel Structure for Backside Protection Against Physical Attacks on Secure Chips or SiP. HAL (Le Centre pour la Communication Scientifique Directe). 515–520. 18 indexed citations
4.
Borel, S., Jean Charbonnier, Jessy Clédière, et al.. (2017). Backside Shield against Physical Attacks for Secure ICs.. Additional Conferences (Device Packaging HiTEC HiTEN & CICMT). 2017(DPC). 1–15. 1 indexed citations
5.
Dutertre, Jean-Max, et al.. (2014). Efficiency of a glitch detector against electromagnetic fault injection. Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014. 1–6. 14 indexed citations
6.
Dutertre, Jean-Max, et al.. (2014). Analysis of the fault injection mechanism related to negative and positive power supply glitches using an on-chip voltmeter. HAL (Le Centre pour la Communication Scientifique Directe). 130–135. 19 indexed citations
7.
Dutertre, Jean-Max, et al.. (2014). Efficiency of a glitch detector against electromagnetic fault injection. Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014. 1–6. 16 indexed citations
8.
Clédière, Jessy, et al.. (2013). Fault Analysis and Evaluation of a True Random Number Generator Embedded in a Processor. Journal of Electronic Testing. 29(3). 367–381. 9 indexed citations
9.
Dutertre, Jean-Max, et al.. (2013). From physical stresses to timing constraints violation. SPIRE - Sciences Po Institutional REpository. 3 indexed citations
10.
Dutertre, Jean-Max, et al.. (2013). Power supply glitch induced faults on FPGA: An in-depth analysis of the injection mechanism. SPIRE - Sciences Po Institutional REpository. 110–115. 46 indexed citations
11.
Clédière, Jessy, et al.. (2013). Electrical Modeling of the Effect of Photoelectric Laser Fault Injection on Bulk CMOS Design. Proceedings - International Symposium for Testing and Failure Analysis. 80224. 361–368. 4 indexed citations
12.
Dutertre, Jean-Max, et al.. (2012). Investigation of timing constraints violation as a fault injection means. SPIRE - Sciences Po Institutional REpository. 23 indexed citations
13.
Dumas, Cécile, et al.. (2011). Influence of the temperature on true random number generators. 24–27. 11 indexed citations
14.
Maistri, Paolo, et al.. (2010). Glitch and Laser Fault Attacks onto a Secure AES Implementation on a SRAM-Based FPGA. Journal of Cryptology. 24(2). 247–268. 48 indexed citations
15.
Clédière, Jessy, et al.. (2008). Defeating classical hardware countermeasures. 1274–1279. 5 indexed citations
16.
Clédière, Jessy, et al.. (2008). Defeating classical Hardware Countermeasures: a new processing for Side Channel Analysis. 2008 Design, Automation and Test in Europe. 1965. 1274–1279. 8 indexed citations
17.
Le, Thanh‐Ha, et al.. (2008). An overview of side channel analysis attacks. 33–43. 33 indexed citations
18.
Le, Thanh‐Ha, Jessy Clédière, Christine Servière, & Jean‐Louis Lacoume. (2007). Efficient Solution for Misalignment of Signal in Side Channel Analysis. II–257. 12 indexed citations
19.
Le, Thanh‐Ha, Jessy Clédière, Christine Servière, & Jean‐Louis Lacoume. (2007). Noise Reduction in Side Channel Attack Using Fourth-Order Cumulant. IEEE Transactions on Information Forensics and Security. 2(4). 710–720. 43 indexed citations
20.
Clédière, Jessy, et al.. (2005). Security testing for hardware products: the security evaluations practice. 122–125. 2 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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