D.C. Keezer

930 total citations
107 papers, 618 citations indexed

About

D.C. Keezer is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Control and Systems Engineering. According to data from OpenAlex, D.C. Keezer has authored 107 papers receiving a total of 618 indexed citations (citations by other indexed papers that have themselves been cited), including 100 papers in Electrical and Electronic Engineering, 51 papers in Hardware and Architecture and 16 papers in Control and Systems Engineering. Recurrent topics in D.C. Keezer's work include VLSI and Analog Circuit Testing (45 papers), Advancements in PLL and VCO Technologies (37 papers) and Integrated Circuits and Semiconductor Failure Analysis (33 papers). D.C. Keezer is often cited by papers focused on VLSI and Analog Circuit Testing (45 papers), Advancements in PLL and VCO Technologies (37 papers) and Integrated Circuits and Semiconductor Failure Analysis (33 papers). D.C. Keezer collaborates with scholars based in United States, Canada and Singapore. D.C. Keezer's co-authors include Madhavan Swaminathan, Abhijit Chatterjee, S. Sermet Akbay, Arnab Halder, Qi Zhou, R.J. Wenzel, Keren Bergman, Swapan Kumar Bhattacharya, Daniel Guidotti and P.M. Raj and has published in prestigious journals such as Journal of Applied Physics, Computer and IEEE Transactions on Magnetics.

In The Last Decade

D.C. Keezer

94 papers receiving 581 citations

Peers

D.C. Keezer
Xu Cheng China
Kyungjun Cho South Korea
M. Roca Spain
Hans G. Kerkhoff Netherlands
Jinwoo Kim South Korea
Wuchen Wu China
Jiwoo Pak United States
D.C. Keezer
Citations per year, relative to D.C. Keezer D.C. Keezer (= 1×) peers Alkis Hatzopoulos

Countries citing papers authored by D.C. Keezer

Since Specialization
Citations

This map shows the geographic impact of D.C. Keezer's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by D.C. Keezer with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites D.C. Keezer more than expected).

Fields of papers citing papers by D.C. Keezer

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by D.C. Keezer. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by D.C. Keezer. The network helps show where D.C. Keezer may publish in the future.

Co-authorship network of co-authors of D.C. Keezer

This figure shows the co-authorship network connecting the top 25 collaborators of D.C. Keezer. A scholar is included among the top collaborators of D.C. Keezer based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with D.C. Keezer. D.C. Keezer is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Swaminathan, Madhavan, et al.. (2015). Reduction of PDN induced coupling into signal lines using PTL power distribution. 117–120. 3 indexed citations
2.
Keezer, D.C., et al.. (2014). A signature based architecture for Trojan detection. 1–10. 8 indexed citations
5.
Swaminathan, Madhavan, et al.. (2011). Pseudo-balanced signaling using power transmission lines for parallel links. 871–876. 7 indexed citations
6.
Keezer, D.C., et al.. (2010). Stretching the limits of FPGA SerDes for enhanced ATE performance. Design, Automation, and Test in Europe. 202–207. 2 indexed citations
7.
Keezer, D.C., et al.. (2009). A development platform and electronic modules for automated test up to 20 Gbps. 1–11. 8 indexed citations
8.
Keezer, D.C., et al.. (2008). An Electronic Module for 12.8 Gbps Multiplexing and Loopback Test. 1–9. 8 indexed citations
9.
Keezer, D.C., et al.. (2007). Method for reducing jitter in multi-gigahertz ATE. Design, Automation, and Test in Europe. 701–706. 3 indexed citations
10.
Keezer, D.C., et al.. (2006). An Improved Low-Cost 6.4 Gbps Wafer-Level Tester. 2. 814–819. 3 indexed citations
11.
Keezer, D.C., et al.. (2005). Low-Cost Multi-Gigahertz Test Systems Using CMOS FPGAs and PECL. Design, Automation, and Test in Europe. 152–157. 7 indexed citations
12.
Keezer, D.C., et al.. (2005). Performance characteristics of a 5 Gbps functional test module. 244–248. 3 indexed citations
13.
Keezer, D.C.. (2005). REAL-TIME DATA COMPARISON FOR GIGAHERTZ DIGITAL TEST. 790–790. 1 indexed citations
14.
Keezer, D.C., et al.. (2005). HIGH FREQUENCY WAFER PROBING AND POWER SUPPLY RESONANCE EFFECTS. 1069–1069.
15.
Tummala, Rao, Madhavan Swaminathan, Manos M. Tentzeris, et al.. (2004). The SOP for Miniaturized, Mixed-Signal Computing, Communication, and Consumer Systems of the Next Decade. IEEE Transactions on Advanced Packaging. 27(2). 250–267. 113 indexed citations
16.
Keezer, D.C., et al.. (2004). Low-cost strategies for testing multi-gigahertz SOPs and components. 410–414. 4 indexed citations
17.
Deng, Chun, Simon S. Ang, Hanhua Feng, et al.. (2004). A MEMS based interposer for nano-wafer level packaging test. 405–409. 7 indexed citations
18.
Thacker, Hiren, Muhannad S. Bakir, D.C. Keezer, K. P. Martin, & J.D. Meindl. (2003). Compliant probe substrates for testing high pin-count chip scale packages. 1188–1193. 6 indexed citations
19.
Keezer, D.C. & Qi Zhou. (2002). Alternative interface methods for testing high speed bidirectional signals. 824–830. 7 indexed citations
20.
Keezer, D.C., et al.. (2002). A low-cost massively-parallel interconnect test method for MCM substrates. 370–378. 2 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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