Anup Dandapat

976 total citations
57 papers, 637 citations indexed

About

Anup Dandapat is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Biomedical Engineering. According to data from OpenAlex, Anup Dandapat has authored 57 papers receiving a total of 637 indexed citations (citations by other indexed papers that have themselves been cited), including 42 papers in Electrical and Electronic Engineering, 28 papers in Hardware and Architecture and 17 papers in Biomedical Engineering. Recurrent topics in Anup Dandapat's work include Low-power high-performance VLSI design (27 papers), Network Packet Processing and Optimization (23 papers) and Analog and Mixed-Signal Circuit Design (17 papers). Anup Dandapat is often cited by papers focused on Low-power high-performance VLSI design (27 papers), Network Packet Processing and Optimization (23 papers) and Analog and Mixed-Signal Circuit Design (17 papers). Anup Dandapat collaborates with scholars based in India. Anup Dandapat's co-authors include Partha Bhattacharyya, Prabir Saha, Vinay Kumar, Arindam Banerjee, Abhijit Banerjee, Deepak Kumar, Chinmoy Sarkar, Partha Sarkar, Sandip Ghosal and Debdeep Mukhopadhyay and has published in prestigious journals such as Electronics Letters, IEEE Transactions on Circuits and Systems I Regular Papers and IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

In The Last Decade

Anup Dandapat

50 papers receiving 568 citations

Peers

Countries citing papers authored by Anup Dandapat

Since Specialization

Citations

This map shows the geographic impact of Anup Dandapat's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Anup Dandapat with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Anup Dandapat more than expected).

Fields of papers citing papers by Anup Dandapat

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Anup Dandapat. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Anup Dandapat. The network helps show where Anup Dandapat may publish in the future.

Co-authorship network of co-authors of Anup Dandapat

This figure shows the co-authorship network connecting the top 25 collaborators of Anup Dandapat. A scholar is included among the top collaborators of Anup Dandapat based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Anup Dandapat. Anup Dandapat is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Content-addressable memory using selective-charging and adaptive-discharging scheme for low-power hardware search engine 2024 ·Integration ·(unknown), (unknown), (unknown), Anup Dandapat	3
2	SMS-CAM: Shared matchline scheme for content addressable memory 2022 ·Integration ·(unknown), (unknown), (unknown), Anup Dandapat	6
3	A Novel Low-Power Matchline Evaluation Technique for Content Addressable Memory (CAM). 2020 ·Journal of information science and engineering ·(unknown), (unknown), (unknown), Anup Dandapat	1
4	A Low-Power Split-Controlled Single Ended Storage Content Addressable Memory 2019 ·(unknown), (unknown), (unknown), Anup Dandapat	3
5	A 10-bit 2.33 fJ/conv. SAR-ADC with high speed capacitive DAC switching using a novel effective asynchronous control circuitry 2019 ·Analog Integrated Circuits and Signal Processing ·Farhana Begum, (unknown), (unknown), Anup Dandapat	0
6	Design and Implementation of Drivers and Selectors for Content Addressable Memory (CAM) 2019 ·(unknown), (unknown), (unknown), Anup Dandapat	2
7	A 10-bit 2.5 GS/s low power hybrid subranging flash-SAR ADC for high data rate communication 2018 ·CSI Transactions on ICT ·Farhana Begum, Anup Dandapat	0
8	Discretized Sinusoidal Waveform Generators for Signal Processing Applications 2018 ·2018 2nd International Conference on Trends in Electronics and Informatics (ICOEI) ·(unknown), Deepak Kumar, Anup Dandapat, Prabir Saha	1
9	HARDWARE IMPLEMENTATION OF METHODOLOGIES OF FIXED POINT DIVISION ALGORITHMS 2017 ·International Journal on Smart Sensing and Intelligent Systems ·Deepak Kumar, Prabir Saha, Anup Dandapat	11
10	EMDBAM: A Low-Power Dual Bit Associative Memory With Match Error and Mask Control 2015 ·IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·(unknown), Anup Dandapat	5
11	HIGH SPEED MULTIPLIER USING HIGH ACCURACY OATING POINT LOGARITHMIC NUMBER SYSTEM 2014 ·Scientia Iranica ·Prabir Saha, Arindam Banerjee, Anup Dandapat, Partha Bhattacharyya	2
12	Improved matrix multiplier design for high‐speed digital signal processing applications 2014 ·IET Circuits Devices & Systems ·Prabir Saha, Arindam Banerjee, Partha Bhattacharyya, Anup Dandapat	18
13	Reciprocal Unit Based on Vedic Mathematics for Signal Processing Applications 2013 ·Prabir Saha, Deepak Kumar, Partha Bhattacharyya, Anup Dandapat	0
14	ASIC implementation of high speed processor for computing fast hartley transformation 2013 ·Prabir Saha, Partha Bhattacharyya, Deepak Kumar, Anup Dandapat	2
15	A Novel Design of Seven Segment Decoder Using Cyclic Combinational Technique 2013 ·Journal of Low Power Electronics ·(unknown), (unknown), (unknown), Prantik Bhattacharyya, Anup Dandapat	1
16	ASIC implementation of high speed processor for calculating discrete Fourier transformation using circular convolution technique 2011 ·WSEAS Transactions on Circuits and Systems archive ·Prabir Saha, Arindam Banerjee, Anup Dandapat, Partha Bhattacharyya	3
17	Vedic Divider: Novel Architecture (ASIC) for High Speed VLSI Applications 2011 ·Prabir Saha, Arindam Banerjee, Partha Bhattacharyya, Anup Dandapat	14
18	Design and analysis of tree-multiplier using single-clocked energy efficient adiabatic Logic 2011 ·Manash Chanda, Subrata Kundu, (unknown), Anup Dandapat, Hafizur Rahaman	1
19	Low-power sequential circuit using single phase Adiabatic Dynamic Logic 2009 ·Manash Chanda, Anup Dandapat, Hafizur Rahaman	1
20	Design of a Low Leakage, Low Power and High Performance Search and Read Memory Using CAM and SRAM 2008 ·Journal of Low Power Electronics ·Anup Dandapat, (unknown), Debdeep Mukhopadhyay	2

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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