Standout Papers

An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS 2008 2026 2014 2020 273
  1. An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS (2008)
    Sriram Vangal, Jason Howard et al. IEEE Journal of Solid-State Circuits

Immediate Impact

2 from Science/Nature 50 standout
Sub-graph 1 of 18

Citing Papers

Prospects and applications of on-chip lasers
2023 Standout
Wurtzite and fluorite ferroelectric materials for electronic memory
2023 Standout
2 intermediate papers

Works of Jason Howard being referenced

2 GHz 2 Mb 2T Gain Cell Memory Macro With 128 GBytes/sec Bandwidth in a 65 nm Logic Process Technology
2009
An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS
2008 Standout

Author Peers

Author Last Decade Papers Cites
Jason Howard 392 347 363 10 576
Vasantha Erraguntla 422 359 337 8 562
Greg Ruhl 419 332 343 6 568
Karam S. Chatha 449 436 301 25 584
Ge-Ming Chiu 499 294 300 17 664
Matthew Mattina 473 386 285 12 679
Kevin K. Chang 478 313 304 28 643
Cristian Grecu 483 375 341 17 613
Volker Strumpen 472 428 186 13 563
Victor Zyuban 300 371 306 14 533
R. Saleh 431 366 336 11 561

All Works

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2026