Standout Papers

An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS 2008 2026 2014 2020 273
  1. An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS (2008)
    Sriram Vangal, Jason Howard et al. IEEE Journal of Solid-State Circuits

Immediate Impact

2 from Science/Nature 46 standout
Sub-graph 1 of 17

Citing Papers

Prospects and applications of on-chip lasers
2023 Standout
Wurtzite and fluorite ferroelectric materials for electronic memory
2023 Standout
2 intermediate papers

Works of Greg Ruhl being referenced

2 GHz 2 Mb 2T Gain Cell Memory Macro With 128 GBytes/sec Bandwidth in a 65 nm Logic Process Technology
2009
An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS
2008 Standout

Author Peers

Author Last Decade Papers Cites
Greg Ruhl 419 332 343 6 568
Vasantha Erraguntla 422 359 337 8 562
Saurabh Dighe 365 320 293 4 488
Jason Howard 392 347 363 10 576
B. Edwards 430 340 222 4 492
Christopher J. Glass 608 355 313 7 618
Carl Ramey 415 338 239 3 494
Chris Fallin 252 280 222 11 464
Volker Strumpen 472 428 186 13 563
Karam S. Chatha 449 436 301 25 584
Cristian Grecu 483 375 341 17 613

All Works

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2026