Zuochang Ye
- Electrical and Electronic Engineering top 10%
- Hardware and Architecture top 5%
- Computer Vision and Pattern Recognition top 10%
- Artificial Intelligence
- Biomedical Engineering
- Topics
- Low-power high-performance VLSI design (20 papers)VLSI and Analog Circuit Testing (15 papers)Radio Frequency Integrated Circuit Design (14 papers)
- Cited by
- Hardware and ArchitectureElectrical and Electronic EngineeringStatistics, Probability and Uncertainty
- Journals
- IEEE Transactions on Microwave Theory and TechniquesIEEE Transactions on Electron DevicesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Partner nations
- ChinaUnited StatesPortugal
In The Last Decade
Zuochang Ye
78 papers receiving 534 citations
Peers
Comparison fields: 5 of 56
- Electrical and Electronic Engineering 430
- Hardware and Architecture 105
- Computer Vision and Pattern Recognition 65
- Artificial Intelligence 48
- Biomedical Engineering 47
Countries citing papers authored by Zuochang Ye
This map shows the geographic impact of Zuochang Ye's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Zuochang Ye with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Zuochang Ye more than expected).
Fields of papers citing papers by Zuochang Ye
This network shows the impact of papers produced by Zuochang Ye. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Zuochang Ye. The network helps show where Zuochang Ye may publish in the future.
Co-authorship network of co-authors of Zuochang Ye
This figure shows the co-authorship network connecting the top 25 collaborators of Zuochang Ye. A scholar is included among the top collaborators of Zuochang Ye based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Zuochang Ye. Zuochang Ye is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 2 | |
| 2 | 1 | |
| 3 | 1 | |
| 4 | 1 | |
| 5 | 2 | |
| 6 | 3 | |
| 7 | 4 | |
| 8 | 3 | |
| 9 | 47 | |
| 10 | 混合代理モデリングを用いた効率的なSRAM歩留り最適化【Powered by NICT】 | 1 |
| 11 | 2 | |
| 12 | 1 | |
| 13 | 2 | |
| 14 | 7 | |
| 15 | 11 | |
| 16 | 3 | |
| 17 | 7 | |
| 18 | 13 | |
| 19 | 23 | |
| 20 | 10 |
About Zuochang Ye
Zuochang Ye is a scholar working on Hardware and Architecture, Statistics, Probability and Uncertainty and Electrical and Electronic Engineering, having authored 83 papers that have together received 553 indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (20 papers), VLSI and Analog Circuit Testing (15 papers) and Radio Frequency Integrated Circuit Design (14 papers). The work is most often cited by research in Hardware and Architecture (105 citations), Electrical and Electronic Engineering (430 citations) and Statistics, Probability and Uncertainty (29 citations). Zuochang Ye has collaborated with scholars based in China, United States and Portugal. Frequent co-authors include Yan Wang, Zhiping Yu, Joel Phillips, Jian Yao, Chuan Qin, Zhenhai Zhu, Wenjian Yu, L. Miguel Silveira, Tianshi Wang and Dmitry Vasilyev. Their work appears in journals such as IEEE Transactions on Microwave Theory and Techniques, IEEE Transactions on Electron Devices and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.